Synthesis Report #Build: Synplify Pro (R) V-2023.09LR-1, Build 251R, May 14 2024 #install: C:\lscc\radiant\2024.1\synpbase #OS: Windows 10 or later #Hostname: LPGL109135 # Thu Sep 5 14:20:32 2024 #Implementation: imp1 Copyright (C) 1994-2023 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: V-2023.09LR-1 Install: C:\lscc\radiant\2024.1\synpbase OS: Windows 10 or later Hostname: LPGL109135 Implementation : imp1 Synopsys HDL Compiler, Version comp202309synp1, Build 251R, Built May 14 2024 08:13:06, @ @N|Running in 64-bit mode ###########################################################[ Copyright (C) 1994-2023 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: V-2023.09LR-1 Install: C:\lscc\radiant\2024.1\synpbase OS: Windows 10 or later Hostname: LPGL109135 Implementation : imp1 Synopsys VHDL Compiler, Version comp202309synp1, Build 251R, Built May 14 2024 08:13:06, @ @N|Running in 64-bit mode @N:"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Top entity is set to Top. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\reveal_coretop.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\mysettings.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\ce_sync_uniq_0.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_0.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_1.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_2.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_3.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top.vhd'. VHDL syntax check successful! File C:\lscc\radiant\2023.1\synpbase\bin64\c_vhdl.exe changed - recompiling File C:\lscc\radiant\2023.1\synpbase\lib\vhd\location.map changed - recompiling File C:\lscc\radiant\2023.1\synpbase\lib\vhd\std.vhd changed - recompiling File C:\lscc\radiant\2023.1\synpbase\lib\vhd\snps_haps_pkg.vhd changed - recompiling File C:\lscc\radiant\2023.1\synpbase\lib\vhd\std1164.vhd changed - recompiling File C:\lscc\radiant\2023.1\synpbase\lib\vhd\numeric.vhd changed - recompiling File C:\lscc\radiant\2023.1\synpbase\lib\vhd\umr_capim.vhd changed - recompiling File C:\lscc\radiant\2023.1\synpbase\lib\vhd\arith.vhd changed - recompiling File C:\lscc\radiant\2023.1\synpbase\lib\vhd\unsigned.vhd changed - recompiling File C:\lscc\radiant\2023.1\ip\pmi\pmi_lfcpnx.vhd changed - recompiling File D:\02_LSCC\09_GSR\Final\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\reveal_coretop.vhd changed - recompiling File D:\02_LSCC\09_GSR\Final\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\mysettings.vhd changed - recompiling File D:\02_LSCC\09_GSR\Final\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\ce_sync_uniq_0.vhd changed - recompiling File D:\02_LSCC\09_GSR\Final\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_0.vhd changed - recompiling File D:\02_LSCC\09_GSR\Final\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_1.vhd changed - recompiling File D:\02_LSCC\09_GSR\Final\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_2.vhd changed - recompiling File D:\02_LSCC\09_GSR\Final\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_3.vhd changed - recompiling File D:\02_LSCC\09_GSR\Final\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top.vhd changed - recompiling File C:\lscc\radiant\2023.1\synpbase\lib\vhd\signed.vhd changed - recompiling At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 88MB peak: 89MB) Process completed successfully. # Thu Sep 5 14:20:33 2024 ###########################################################] ###########################################################[ Copyright (C) 1994-2023 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: V-2023.09LR-1 Install: C:\lscc\radiant\2024.1\synpbase OS: Windows 10 or later Hostname: LPGL109135 Implementation : imp1 Synopsys Verilog Compiler, Version comp202309synp1, Build 251R, Built May 14 2024 08:13:06, @ @N|Running in 64-bit mode @I::"C:\lscc\radiant\2024.1\synpbase\lib\lucent\lfcpnx.v" (library work) @I::"C:\lscc\radiant\2024.1\synpbase\lib\lucent\pmi_def.v" (library work) @I::"C:\lscc\radiant\2024.1\synpbase\lib\vlog\hypermods.v" (library __hyper__lib__) @I::"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_addsub.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_addsub.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/adder_subtractor/rtl\lscc_add_sub.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/adder_subtractor/rtl\lscc_add_sub.v":313:13:313:25|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/adder_subtractor/rtl\lscc_add_sub.v":333:13:333:24|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_add.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_add.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/adder/rtl\lscc_adder.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_complex_mult.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_complex_mult.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/complex_mult/rtl\lscc_complex_mult.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_complex_mult.v":92:11:92:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_complex_mult.v":101:11:101:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_counter.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_counter.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/counter/rtl\lscc_cntr.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/counter/rtl\lscc_cntr.v":129:13:129:25|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/counter/rtl\lscc_cntr.v":143:13:143:24|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_dpram.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_dpram.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/distributed_dpram/rtl\lscc_distributed_dpram.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_spram.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_spram.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/distributed_spram/rtl\lscc_distributed_spram.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_rom.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_rom.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/distributed_rom/rtl\lscc_distributed_rom.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_shift_reg.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_shift_reg.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_shift_reg.v":126:11:126:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_shift_reg.v":135:11:135:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_fifo.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_fifo.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo/rtl\lscc_fifo.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo/rtl\lscc_fifo.v":3259:17:3259:29|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo/rtl\lscc_fifo.v":3266:17:3266:28|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo/rtl\lscc_fifo.v":3309:17:3309:29|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo/rtl\lscc_fifo.v":3316:17:3316:28|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo/rtl\lscc_fifo.v":3359:17:3359:29|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo/rtl\lscc_fifo.v":3366:17:3366:28|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_fifo_dc.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_fifo_dc.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo_dc/rtl\lscc_fifo_dc.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo_dc/rtl\lscc_fifo_dc.v":5110:25:5110:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo_dc/rtl\lscc_fifo_dc.v":5114:25:5114:36|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo_dc/rtl\lscc_fifo_dc.v":5145:29:5145:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo_dc/rtl\lscc_fifo_dc.v":5149:29:5149:40|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_mac.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_mac.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/mult_accumulate/rtl\lscc_mult_accumulate.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_mac.v":94:11:94:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_mac.v":109:11:109:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsubsum.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsubsum.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/mult_add_sub_sum/rtl\lscc_mult_add_sub_sum.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/mult_add_sub_sum/rtl\lscc_mult_add_sub_sum.v":210:13:210:25|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/mult_add_sub_sum/rtl\lscc_mult_add_sub_sum.v":227:13:227:24|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsubsum.v":84:11:84:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsubsum.v":93:11:93:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsub.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsub.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/mult_add_sub/rtl\lscc_mult_add_sub.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsub.v":91:11:91:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsub.v":100:11:100:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_mult.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_mult.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/multiplier/rtl\lscc_multiplier.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_mult.v":87:11:87:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_mult.v":96:11:96:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dp.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dp.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp/rtl\lscc_ram_dp.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp/rtl\lscc_ram_dp.v":1060:25:1060:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp/rtl\lscc_ram_dp.v":1064:25:1064:36|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp/rtl\lscc_ram_dp.v":1095:29:1095:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp/rtl\lscc_ram_dp.v":1099:29:1099:40|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dp_be.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dp_be.v":146:11:146:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dp_be.v":155:11:155:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dp_true.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dp_true.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1880:29:1880:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1885:29:1885:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1916:33:1916:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1920:33:1920:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1953:29:1953:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1958:29:1958:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1988:33:1988:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1992:33:1992:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2508:29:2508:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2513:29:2513:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2544:33:2544:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2548:33:2548:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2581:29:2581:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2586:29:2586:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2617:33:2617:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2621:33:2621:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3108:29:3108:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3113:29:3113:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3144:33:3144:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3148:33:3148:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3181:29:3181:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3186:29:3186:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3217:33:3217:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3221:33:3221:44|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dq.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dq.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dq/rtl\lscc_ram_dq.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dq/rtl\lscc_ram_dq.v":1485:25:1485:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dq/rtl\lscc_ram_dq.v":1491:25:1491:36|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dq_be.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dq_be.v":87:11:87:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dq_be.v":95:11:95:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_rom.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_rom.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/rom/rtl\lscc_rom.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/rom/rtl\lscc_rom.v":970:25:970:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/rom/rtl\lscc_rom.v":976:25:976:36|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_sub.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_sub.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/subtractor/rtl\lscc_subtractor.v" (library work) @I::"C:\lscc\radiant\2024.1\data\reveal\src\ertl\ertl.v" (library work) @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\ertl.v":242:7:242:17|Net jupdate_int is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\ertl.v":243:7:243:19|Net jupdate_early is not declared. @I::"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v" (library work) @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":70:7:70:11|Net JTDIb is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":71:7:71:11|Net JCE1b is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":72:7:72:11|Net JCE2b is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":73:7:73:12|Net JRSTNb is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":74:7:74:13|Net JSHIFTb is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":75:7:75:14|Net JUPDATEb is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":76:7:76:12|Net JRTI1b is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":77:7:77:12|Net JRTI2b is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":78:7:78:11|Net JTCKb is not declared. @W: CS141 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":802:28:802:32|Unrecognized synthesis directive state. Verify the correct directive name. @I::"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v" (library work) @I::"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top_la0_gen.v" (library work) Verilog syntax check successful! At c_ver Exit (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 133MB peak: 133MB) Process completed successfully. # Thu Sep 5 14:20:35 2024 ###########################################################] ###########################################################[ @N:"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Top entity is set to Top. Options changed - recompiling @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\reveal_coretop.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\mysettings.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\ce_sync_uniq_0.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_0.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_1.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_2.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_3.vhd'. @N: CD140 : | Using the VHDL 1993 Standard for file 'C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top.vhd'. VHDL syntax check successful! Options changed - recompiling @N: CD630 :"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Synthesizing work.top.behave. Running optimization stage 1 on OSCA ....... Finished optimization stage 1 on OSCA (CPU Time 0h:00m:00s, Memory Used current: 93MB peak: 94MB) @W: CD638 :"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top.vhd":237:11:237:19|Signal reveal_in is undriven. Either assign the signal a value or remove the signal declaration. @W: CD638 :"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top.vhd":238:11:238:20|Signal reveal_out is undriven. Either assign the signal a value or remove the signal declaration. @N: CD630 :"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\reveal_coretop.vhd":4:7:4:20|Synthesizing work.reveal_coretop.one. @W: CD638 :"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\reveal_coretop.vhd":27:11:27:21|Signal trigger_out is undriven. Either assign the signal a value or remove the signal declaration. Running optimization stage 1 on top_la0 ....... Finished optimization stage 1 on top_la0 (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) Post processing for work.reveal_coretop.one Running optimization stage 1 on reveal_coretop ....... Finished optimization stage 1 on reveal_coretop (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) @N: CD630 :"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_3.vhd":5:7:5:16|Synthesizing work.cnt_uniq_3.rtl. Post processing for work.cnt_uniq_3.rtl Running optimization stage 1 on CNT_uniq_3 ....... Finished optimization stage 1 on CNT_uniq_3 (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) @N: CD630 :"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_2.vhd":5:7:5:16|Synthesizing work.cnt_uniq_2.rtl. Post processing for work.cnt_uniq_2.rtl Running optimization stage 1 on CNT_uniq_2 ....... Finished optimization stage 1 on CNT_uniq_2 (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) @N: CD630 :"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_1.vhd":5:7:5:16|Synthesizing work.cnt_uniq_1.rtl. Post processing for work.cnt_uniq_1.rtl Running optimization stage 1 on CNT_uniq_1 ....... Finished optimization stage 1 on CNT_uniq_1 (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) @N: CD630 :"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\cnt_uniq_0.vhd":5:7:5:16|Synthesizing work.cnt_uniq_0.rtl. Post processing for work.cnt_uniq_0.rtl Running optimization stage 1 on CNT_uniq_0 ....... Finished optimization stage 1 on CNT_uniq_0 (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) @N: CD630 :"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\ce_sync_uniq_0.vhd":5:7:5:20|Synthesizing work.ce_sync_uniq_0.rtl. Running optimization stage 1 on DCC ....... Finished optimization stage 1 on DCC (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) Post processing for work.ce_sync_uniq_0.rtl Running optimization stage 1 on CE_Sync_uniq_0 ....... Finished optimization stage 1 on CE_Sync_uniq_0 (CPU Time 0h:00m:00s, Memory Used current: 95MB peak: 95MB) Post processing for work.top.behave Running optimization stage 1 on Top ....... Finished optimization stage 1 on Top (CPU Time 0h:00m:00s, Memory Used current: 95MB peak: 95MB) Running optimization stage 2 on DCC ....... Finished optimization stage 2 on DCC (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) Running optimization stage 2 on CE_Sync_uniq_0 ....... Finished optimization stage 2 on CE_Sync_uniq_0 (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) Running optimization stage 2 on CNT_uniq_0_work_top_behave_0layer0 ....... Finished optimization stage 2 on CNT_uniq_0_work_top_behave_0layer0 (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) Running optimization stage 2 on CNT_uniq_1_work_top_behave_0layer0 ....... Finished optimization stage 2 on CNT_uniq_1_work_top_behave_0layer0 (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) Running optimization stage 2 on CNT_uniq_2_work_top_behave_0layer0 ....... Finished optimization stage 2 on CNT_uniq_2_work_top_behave_0layer0 (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) Running optimization stage 2 on CNT_uniq_3_work_top_behave_0layer0 ....... Finished optimization stage 2 on CNT_uniq_3_work_top_behave_0layer0 (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) Running optimization stage 2 on top_la0 ....... Finished optimization stage 2 on top_la0 (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) Running optimization stage 2 on reveal_coretop ....... Finished optimization stage 2 on reveal_coretop (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) Running optimization stage 2 on OSCA ....... Finished optimization stage 2 on OSCA (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) Running optimization stage 2 on Top ....... Finished optimization stage 2 on Top (CPU Time 0h:00m:00s, Memory Used current: 94MB peak: 95MB) For a summary of runtime per design unit, please see file: ========================================================== @L: C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\synwork\layer0.duruntime At c_vhdl Exit (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 94MB peak: 95MB) Process completed successfully. # Thu Sep 5 14:20:37 2024 ###########################################################] ###########################################################[ @I::"C:\lscc\radiant\2024.1\synpbase\lib\lucent\lfcpnx.v" (library work) @I::"C:\lscc\radiant\2024.1\synpbase\lib\lucent\pmi_def.v" (library work) @I::"C:\lscc\radiant\2024.1\synpbase\lib\vlog\hypermods.v" (library __hyper__lib__) @I::"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_addsub.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_addsub.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/adder_subtractor/rtl\lscc_add_sub.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/adder_subtractor/rtl\lscc_add_sub.v":313:13:313:25|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/adder_subtractor/rtl\lscc_add_sub.v":333:13:333:24|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_add.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_add.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/adder/rtl\lscc_adder.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_complex_mult.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_complex_mult.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/complex_mult/rtl\lscc_complex_mult.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_complex_mult.v":92:11:92:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_complex_mult.v":101:11:101:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_counter.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_counter.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/counter/rtl\lscc_cntr.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/counter/rtl\lscc_cntr.v":129:13:129:25|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/counter/rtl\lscc_cntr.v":143:13:143:24|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_dpram.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_dpram.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/distributed_dpram/rtl\lscc_distributed_dpram.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_spram.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_spram.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/distributed_spram/rtl\lscc_distributed_spram.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_rom.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_rom.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/distributed_rom/rtl\lscc_distributed_rom.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_shift_reg.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_shift_reg.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_shift_reg/rtl\lscc_shift_register.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_shift_reg.v":126:11:126:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_distributed_shift_reg.v":135:11:135:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_fifo.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_fifo.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo/rtl\lscc_fifo.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo/rtl\lscc_fifo.v":3259:17:3259:29|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo/rtl\lscc_fifo.v":3266:17:3266:28|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo/rtl\lscc_fifo.v":3309:17:3309:29|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo/rtl\lscc_fifo.v":3316:17:3316:28|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo/rtl\lscc_fifo.v":3359:17:3359:29|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo/rtl\lscc_fifo.v":3366:17:3366:28|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_fifo_dc.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_fifo_dc.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo_dc/rtl\lscc_fifo_dc.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo_dc/rtl\lscc_fifo_dc.v":5110:25:5110:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo_dc/rtl\lscc_fifo_dc.v":5114:25:5114:36|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo_dc/rtl\lscc_fifo_dc.v":5145:29:5145:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/fifo_dc/rtl\lscc_fifo_dc.v":5149:29:5149:40|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_mac.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_mac.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/mult_accumulate/rtl\lscc_mult_accumulate.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_mac.v":94:11:94:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_mac.v":109:11:109:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsubsum.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsubsum.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/mult_add_sub_sum/rtl\lscc_mult_add_sub_sum.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/mult_add_sub_sum/rtl\lscc_mult_add_sub_sum.v":210:13:210:25|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/mult_add_sub_sum/rtl\lscc_mult_add_sub_sum.v":227:13:227:24|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsubsum.v":84:11:84:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsubsum.v":93:11:93:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsub.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsub.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/mult_add_sub/rtl\lscc_mult_add_sub.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsub.v":91:11:91:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_multaddsub.v":100:11:100:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_mult.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_mult.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/multiplier/rtl\lscc_multiplier.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_mult.v":87:11:87:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_mult.v":96:11:96:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dp.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dp.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp/rtl\lscc_ram_dp.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp/rtl\lscc_ram_dp.v":1060:25:1060:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp/rtl\lscc_ram_dp.v":1064:25:1064:36|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp/rtl\lscc_ram_dp.v":1095:29:1095:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp/rtl\lscc_ram_dp.v":1099:29:1099:40|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dp_be.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dp_be.v":146:11:146:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dp_be.v":155:11:155:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dp_true.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dp_true.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1880:29:1880:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1885:29:1885:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1916:33:1916:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1920:33:1920:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1953:29:1953:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1958:29:1958:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1988:33:1988:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":1992:33:1992:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2508:29:2508:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2513:29:2513:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2544:33:2544:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2548:33:2548:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2581:29:2581:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2586:29:2586:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2617:33:2617:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":2621:33:2621:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3108:29:3108:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3113:29:3113:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3144:33:3144:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3148:33:3148:44|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3181:29:3181:41|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3186:29:3186:40|Read directive translate_on. @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3217:33:3217:45|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dp_true/rtl\lscc_ram_dp_true.v":3221:33:3221:44|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dq.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dq.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dq/rtl\lscc_ram_dq.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dq/rtl\lscc_ram_dq.v":1485:25:1485:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/ram_dq/rtl\lscc_ram_dq.v":1491:25:1491:36|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dq_be.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dq_be.v":87:11:87:23|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\pmi_ram_dq_be.v":95:11:95:22|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_rom.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_rom.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/rom/rtl\lscc_rom.v" (library work) @N: CG334 :"C:\lscc\radiant\2024.1\ip\pmi\../common/rom/rtl\lscc_rom.v":970:25:970:37|Read directive translate_off. @N: CG333 :"C:\lscc\radiant\2024.1\ip\pmi\../common/rom/rtl\lscc_rom.v":976:25:976:36|Read directive translate_on. @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_lfcpnx.v":"C:\lscc\radiant\2024.1\ip\pmi\pmi_sub.v" (library work) @I:"C:\lscc\radiant\2024.1\ip\pmi\pmi_sub.v":"C:\lscc\radiant\2024.1\ip\pmi\../common/subtractor/rtl\lscc_subtractor.v" (library work) @I::"C:\lscc\radiant\2024.1\data\reveal\src\ertl\ertl.v" (library work) @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\ertl.v":242:7:242:17|Net jupdate_int is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\ertl.v":243:7:243:19|Net jupdate_early is not declared. @I::"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v" (library work) @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":70:7:70:11|Net JTDIb is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":71:7:71:11|Net JCE1b is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":72:7:72:11|Net JCE2b is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":73:7:73:12|Net JRSTNb is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":74:7:74:13|Net JSHIFTb is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":75:7:75:14|Net JUPDATEb is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":76:7:76:12|Net JRTI1b is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":77:7:77:12|Net JRTI2b is not declared. @W: CG1337 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":78:7:78:11|Net JTCKb is not declared. @W: CS141 :"C:\lscc\radiant\2024.1\data\reveal\src\ertl\JTAG_SOFT.v":802:28:802:32|Unrecognized synthesis directive state. Verify the correct directive name. @I::"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v" (library work) @I::"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top_la0_gen.v" (library work) Verilog syntax check successful! Running optimization stage 1 on rvl_jtag_int_65s_65s_0s_0s_7s_65s_65s ....... Finished optimization stage 1 on rvl_jtag_int_65s_65s_0s_0s_7s_65s_65s (CPU Time 0h:00m:00s, Memory Used current: 138MB peak: 139MB) Running optimization stage 1 on rvl_decode_5s_2s ....... Finished optimization stage 1 on rvl_decode_5s_2s (CPU Time 0h:00m:00s, Memory Used current: 138MB peak: 139MB) Running optimization stage 1 on rvl_tu_1s_0s_0s_0s_1s ....... Finished optimization stage 1 on rvl_tu_1s_0s_0s_0s_1s (CPU Time 0h:00m:00s, Memory Used current: 138MB peak: 139MB) Running optimization stage 1 on rvl_tu_16s_0s_0s_0s_1s ....... Finished optimization stage 1 on rvl_tu_16s_0s_0s_0s_1s (CPU Time 0h:00m:00s, Memory Used current: 139MB peak: 140MB) Running optimization stage 1 on pmi_rtl_ram_dist_32s_5s_2s_reg_none_binary_LFCPNX ....... Finished optimization stage 1 on pmi_rtl_ram_dist_32s_5s_2s_reg_none_binary_LFCPNX (CPU Time 0h:00m:00s, Memory Used current: 143MB peak: 144MB) Running optimization stage 1 on rvl_te_Z1_layer1 ....... Finished optimization stage 1 on rvl_te_Z1_layer1 (CPU Time 0h:00m:00s, Memory Used current: 144MB peak: 145MB) Running optimization stage 1 on pmi_rtl_ram_dist_32s_5s_8s_reg_none_binary_LFCPNX ....... Finished optimization stage 1 on pmi_rtl_ram_dist_32s_5s_8s_reg_none_binary_LFCPNX (CPU Time 0h:00m:00s, Memory Used current: 144MB peak: 145MB) Running optimization stage 1 on rvl_te_Z2_layer1 ....... Finished optimization stage 1 on rvl_te_Z2_layer1 (CPU Time 0h:00m:00s, Memory Used current: 145MB peak: 146MB) Running optimization stage 1 on rvl_tcnt_2s_3s_1_0s ....... Finished optimization stage 1 on rvl_tcnt_2s_3s_1_0s (CPU Time 0h:00m:00s, Memory Used current: 145MB peak: 146MB) @N: CG364 :"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":11:7:11:18|Synthesizing module top_la0_trig in library work. Running optimization stage 1 on top_la0_trig ....... Finished optimization stage 1 on top_la0_trig (CPU Time 0h:00m:00s, Memory Used current: 145MB peak: 146MB) Running optimization stage 1 on pmi_rtl_ram_dp_32s_5s_65s_reg_none_binary_LFCPNX ....... Finished optimization stage 1 on pmi_rtl_ram_dp_32s_5s_65s_reg_none_binary_LFCPNX (CPU Time 0h:00m:00s, Memory Used current: 145MB peak: 146MB) Running optimization stage 1 on rvl_tm_Z3_layer1 ....... Finished optimization stage 1 on rvl_tm_Z3_layer1 (CPU Time 0h:00m:00s, Memory Used current: 145MB peak: 146MB) @N: CG364 :"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":12:7:12:13|Synthesizing module top_la0 in library work. Running optimization stage 1 on top_la0 ....... Finished optimization stage 1 on top_la0 (CPU Time 0h:00m:00s, Memory Used current: 145MB peak: 146MB) Running optimization stage 2 on top_la0 ....... @N: CL159 :"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":59:7:59:13|Input reset_n is unused. @N: CL159 :"C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":74:7:74:16|Input trigger_en is unused. Finished optimization stage 2 on top_la0 (CPU Time 0h:00m:00s, Memory Used current: 145MB peak: 146MB) Running optimization stage 2 on pmi_rtl_ram_dp_32s_5s_65s_reg_none_binary_LFCPNX ....... Finished optimization stage 2 on pmi_rtl_ram_dp_32s_5s_65s_reg_none_binary_LFCPNX (CPU Time 0h:00m:00s, Memory Used current: 145MB peak: 146MB) Running optimization stage 2 on rvl_tm_Z3_layer1 ....... Finished optimization stage 2 on rvl_tm_Z3_layer1 (CPU Time 0h:00m:00s, Memory Used current: 146MB peak: 148MB) Running optimization stage 2 on top_la0_trig ....... Finished optimization stage 2 on top_la0_trig (CPU Time 0h:00m:00s, Memory Used current: 146MB peak: 148MB) Running optimization stage 2 on rvl_tcnt_2s_3s_1_0s ....... Finished optimization stage 2 on rvl_tcnt_2s_3s_1_0s (CPU Time 0h:00m:00s, Memory Used current: 146MB peak: 148MB) Running optimization stage 2 on pmi_rtl_ram_dist_32s_5s_8s_reg_none_binary_LFCPNX ....... Finished optimization stage 2 on pmi_rtl_ram_dist_32s_5s_8s_reg_none_binary_LFCPNX (CPU Time 0h:00m:00s, Memory Used current: 146MB peak: 148MB) Running optimization stage 2 on rvl_te_Z2_layer1 ....... Finished optimization stage 2 on rvl_te_Z2_layer1 (CPU Time 0h:00m:00s, Memory Used current: 150MB peak: 160MB) Running optimization stage 2 on pmi_rtl_ram_dist_32s_5s_2s_reg_none_binary_LFCPNX ....... Finished optimization stage 2 on pmi_rtl_ram_dist_32s_5s_2s_reg_none_binary_LFCPNX (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 160MB) Running optimization stage 2 on rvl_te_Z1_layer1 ....... Extracted state machine for register next_then_shift State machine has 3 reachable states with original encodings of: 00 01 10 Finished optimization stage 2 on rvl_te_Z1_layer1 (CPU Time 0h:00m:00s, Memory Used current: 149MB peak: 169MB) Running optimization stage 2 on rvl_tu_16s_0s_0s_0s_1s ....... Finished optimization stage 2 on rvl_tu_16s_0s_0s_0s_1s (CPU Time 0h:00m:00s, Memory Used current: 147MB peak: 169MB) Running optimization stage 2 on rvl_tu_1s_0s_0s_0s_1s ....... Finished optimization stage 2 on rvl_tu_1s_0s_0s_0s_1s (CPU Time 0h:00m:00s, Memory Used current: 147MB peak: 169MB) Running optimization stage 2 on rvl_decode_5s_2s ....... Finished optimization stage 2 on rvl_decode_5s_2s (CPU Time 0h:00m:00s, Memory Used current: 147MB peak: 169MB) Running optimization stage 2 on rvl_jtag_int_65s_65s_0s_0s_7s_65s_65s ....... Finished optimization stage 2 on rvl_jtag_int_65s_65s_0s_0s_7s_65s_65s (CPU Time 0h:00m:00s, Memory Used current: 155MB peak: 169MB) For a summary of runtime per design unit, please see file: ========================================================== @L: C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\synwork\layer1.duruntime At c_ver Exit (Real Time elapsed 0h:00m:05s; CPU Time elapsed 0h:00m:05s; Memory used current: 155MB peak: 169MB) Process completed successfully. # Thu Sep 5 14:20:43 2024 ###########################################################] ###########################################################[ Copyright (C) 1994-2023 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: V-2023.09LR-1 Install: C:\lscc\radiant\2024.1\synpbase OS: Windows 10 or later Hostname: LPGL109135 Implementation : imp1 Synopsys Synopsys Netlist Linker, Version comp202309synp1, Build 251R, Built May 14 2024 08:13:06, @ @N|Running in 64-bit mode @W: Z198 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":249:4:249:10|Unbound component OSCA of instance OSCA001 @W: Z198 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\ce_sync_uniq_0.vhd":23:4:23:8|Unbound component DCC of instance DCC01 ======================================================================================= For a summary of linker messages for components that did not bind, please see log file: @L: C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\synwork\LAB04_imp1_comp.linkerlog ======================================================================================= At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:01s; Memory used current: 95MB peak: 95MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Thu Sep 5 14:20:44 2024 ###########################################################] For a summary of runtime and memory usage for all design units, please see file: ========================================================== @L: C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\synwork\LAB04_imp1_comp.rt.csv @END At c_hdl Exit (Real Time elapsed 0h:00m:11s; CPU Time elapsed 0h:00m:10s; Memory used current: 31MB peak: 33MB) Process took 0h:00m:11s realtime, 0h:00m:10s cputime Process completed successfully. # Thu Sep 5 14:20:44 2024 ###########################################################] ###########################################################[ Copyright (C) 1994-2023 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: V-2023.09LR-1 Install: C:\lscc\radiant\2024.1\synpbase OS: Windows 10 or later Hostname: LPGL109135 Implementation : imp1 Synopsys Synopsys Netlist Linker, Version comp202309synp1, Build 251R, Built May 14 2024 08:13:06, @ @N|Running in 64-bit mode File C:\lscc\radiant\2023.1\synpbase\bin64\syn_nfilter.exe changed - recompiling File D:\02_LSCC\09_GSR\Final\LAB02_Prop_Circuit_ARST\imp1\synwork\LAB04_imp1_comp.srs changed - recompiling At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 96MB peak: 96MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Thu Sep 5 14:20:46 2024 ###########################################################] Premap Report # Thu Sep 5 14:20:47 2024 Copyright (C) 1994-2023 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: V-2023.09LR-1 Install: C:\lscc\radiant\2024.1\synpbase OS: Windows 10 or later Hostname: LPGL109135 Implementation : imp1 Synopsys Lattice Technology Pre-mapping, Version map202309lat, Build 101R, Built May 14 2024 08:42:08, @ Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 182MB peak: 182MB) Done reading skeleton netlist (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 189MB peak: 197MB) Reading constraint file: C:\lscc\radiant\2024.1\scripts\tcl\flow\radiant_synplify_vars.tcl Reading constraint file: C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\source\imp1\timingsdc.sdc @L: C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\LAB04_imp1_scck.rpt See clock summary report "C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\LAB04_imp1_scck.rpt" @N: MF916 |Option synthesis_strategy=base is enabled. @N: MF248 |Running in 64-bit mode. @N: MF667 |Clock conversion disabled. (Command "set_option -fix_gated_and_generated_clocks 0" in the project file.) Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 194MB peak: 197MB) Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 194MB peak: 197MB) Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 207MB peak: 207MB) Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 208MB peak: 210MB) NConnInternalConnection caching is on @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":112:0:112:7|Instance decode_u of partition view:work.rvl_decode_5s_2s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":126:0:126:3|Instance tu_0 of partition view:work.rvl_tu_1s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":140:0:140:3|Instance tu_1 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":154:0:154:3|Instance tu_2 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":168:0:168:3|Instance tu_3 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":182:0:182:3|Instance tu_4 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":202:0:202:3|Instance te_0 of partition view:work.rvl_te_Z1_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":242:0:242:3|Instance te_1 of partition view:work.rvl_te_Z2_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":278:0:278:5|Instance tcnt_0 of partition view:work.rvl_tcnt_2s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":112:0:112:7|Instance decode_u of partition view:work.rvl_decode_5s_2s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":126:0:126:3|Instance tu_0 of partition view:work.rvl_tu_1s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":140:0:140:3|Instance tu_1 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":154:0:154:3|Instance tu_2 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":168:0:168:3|Instance tu_3 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":182:0:182:3|Instance tu_4 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":202:0:202:3|Instance te_0 of partition view:work.rvl_te_Z1_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":242:0:242:3|Instance te_1 of partition view:work.rvl_te_Z2_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":278:0:278:5|Instance tcnt_0 of partition view:work.rvl_tcnt_2s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":112:0:112:7|Instance decode_u of partition view:work.rvl_decode_5s_2s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":126:0:126:3|Instance tu_0 of partition view:work.rvl_tu_1s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":140:0:140:3|Instance tu_1 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":154:0:154:3|Instance tu_2 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":168:0:168:3|Instance tu_3 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":182:0:182:3|Instance tu_4 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":202:0:202:3|Instance te_0 of partition view:work.rvl_te_Z1_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":242:0:242:3|Instance te_1 of partition view:work.rvl_te_Z2_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":278:0:278:5|Instance tcnt_0 of partition view:work.rvl_tcnt_2s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":107:0:107:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_65s_65s_0s_0s_7s_65s_65s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":188:0:188:3|Instance tm_u of partition view:work.rvl_tm_Z3_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":107:0:107:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_65s_65s_0s_0s_7s_65s_65s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":188:0:188:3|Instance tm_u of partition view:work.rvl_tm_Z3_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":107:0:107:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_65s_65s_0s_0s_7s_65s_65s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":188:0:188:3|Instance tm_u of partition view:work.rvl_tm_Z3_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":112:0:112:7|Instance decode_u of partition view:work.rvl_decode_5s_2s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":126:0:126:3|Instance tu_0 of partition view:work.rvl_tu_1s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":140:0:140:3|Instance tu_1 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":154:0:154:3|Instance tu_2 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":168:0:168:3|Instance tu_3 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":182:0:182:3|Instance tu_4 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":202:0:202:3|Instance te_0 of partition view:work.rvl_te_Z1_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":242:0:242:3|Instance te_1 of partition view:work.rvl_te_Z2_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":278:0:278:5|Instance tcnt_0 of partition view:work.rvl_tcnt_2s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":112:0:112:7|Instance decode_u of partition view:work.rvl_decode_5s_2s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":126:0:126:3|Instance tu_0 of partition view:work.rvl_tu_1s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":140:0:140:3|Instance tu_1 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":154:0:154:3|Instance tu_2 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":168:0:168:3|Instance tu_3 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":182:0:182:3|Instance tu_4 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":202:0:202:3|Instance te_0 of partition view:work.rvl_te_Z1_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":242:0:242:3|Instance te_1 of partition view:work.rvl_te_Z2_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":278:0:278:5|Instance tcnt_0 of partition view:work.rvl_tcnt_2s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":112:0:112:7|Instance decode_u of partition view:work.rvl_decode_5s_2s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":126:0:126:3|Instance tu_0 of partition view:work.rvl_tu_1s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":140:0:140:3|Instance tu_1 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":154:0:154:3|Instance tu_2 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":168:0:168:3|Instance tu_3 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":182:0:182:3|Instance tu_4 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":202:0:202:3|Instance te_0 of partition view:work.rvl_te_Z1_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":242:0:242:3|Instance te_1 of partition view:work.rvl_te_Z2_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":278:0:278:5|Instance tcnt_0 of partition view:work.rvl_tcnt_2s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":112:0:112:7|Instance decode_u of partition view:work.rvl_decode_5s_2s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":126:0:126:3|Instance tu_0 of partition view:work.rvl_tu_1s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":140:0:140:3|Instance tu_1 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":154:0:154:3|Instance tu_2 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":168:0:168:3|Instance tu_3 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":182:0:182:3|Instance tu_4 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":202:0:202:3|Instance te_0 of partition view:work.rvl_te_Z1_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":242:0:242:3|Instance te_1 of partition view:work.rvl_te_Z2_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":278:0:278:5|Instance tcnt_0 of partition view:work.rvl_tcnt_2s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":112:0:112:7|Instance decode_u of partition view:work.rvl_decode_5s_2s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":126:0:126:3|Instance tu_0 of partition view:work.rvl_tu_1s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":140:0:140:3|Instance tu_1 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":154:0:154:3|Instance tu_2 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":168:0:168:3|Instance tu_3 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":182:0:182:3|Instance tu_4 of partition view:work.rvl_tu_16s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":202:0:202:3|Instance te_0 of partition view:work.rvl_te_Z1_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":242:0:242:3|Instance te_1 of partition view:work.rvl_te_Z2_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":278:0:278:5|Instance tcnt_0 of partition view:work.rvl_tcnt_2s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":107:0:107:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_65s_65s_0s_0s_7s_65s_65s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":188:0:188:3|Instance tm_u of partition view:work.rvl_tm_Z3_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":107:0:107:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_65s_65s_0s_0s_7s_65s_65s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":188:0:188:3|Instance tm_u of partition view:work.rvl_tm_Z3_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":107:0:107:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_65s_65s_0s_0s_7s_65s_65s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":188:0:188:3|Instance tm_u of partition view:work.rvl_tm_Z3_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":107:0:107:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_65s_65s_0s_0s_7s_65s_65s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":188:0:188:3|Instance tm_u of partition view:work.rvl_tm_Z3_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":107:0:107:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_65s_65s_0s_0s_7s_65s_65s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":188:0:188:3|Instance tm_u of partition view:work.rvl_tm_Z3_layer1(verilog) has no references to its outputs; instance not removed. Starting HSTDM IP insertion (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 260MB peak: 260MB) Finished HSTDM IP insertion (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 260MB peak: 260MB) Started DisTri Cleanup (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 260MB peak: 260MB) Finished DisTri Cleanup (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 260MB peak: 260MB) @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":107:0:107:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_65s_65s_0s_0s_7s_65s_65s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":188:0:188:3|Instance tm_u of partition view:work.rvl_tm_Z3_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":112:0:112:7|Instance decode_u of partition view:work.rvl_decode_5s_2s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":126:0:126:3|Instance tu_0 of partition view:work.rvl_tu_1s_0s_0s_0s_1s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":140:0:140:3|Instance tu_1 of partition view:work.rvl_tu_16s_0s_0s_0s_1s_3(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":154:0:154:3|Instance tu_2 of partition view:work.rvl_tu_16s_0s_0s_0s_1s_2(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":168:0:168:3|Instance tu_3 of partition view:work.rvl_tu_16s_0s_0s_0s_1s_1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":182:0:182:3|Instance tu_4 of partition view:work.rvl_tu_16s_0s_0s_0s_1s_0(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":202:0:202:3|Instance te_0 of partition view:work.rvl_te_Z1_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":242:0:242:3|Instance te_1 of partition view:work.rvl_te_Z2_layer1(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_trig_gen.v":278:0:278:5|Instance tcnt_0 of partition view:work.rvl_tcnt_2s_3s_1_0s(verilog) has no references to its outputs; instance not removed. @W: BN117 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top_la0_gen.v":107:0:107:9|Instance jtag_int_u of partition view:work.rvl_jtag_int_65s_65s_0s_0s_7s_65s_65s(verilog) has no references to its outputs; instance not removed. Only the first 100 messages of id 'BN117' are reported. To see all messages use 'report_messages -log C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\synlog\LAB04_imp1_premap.srr -id BN117' in the Tcl shell. To see all messages in future runs, use the command 'message_override -limit {BN117} -count unlimited' in the Tcl shell. Encoding state machine <encrypted> (in view: work.rvl_te_Z1_layer1(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 Starting clock optimization report phase (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 262MB peak: 262MB) Finished clock optimization report phase (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 263MB peak: 263MB) @N: FX1184 |Applying syn_allowed_resources blockrams=208 on top level netlist Top Finished netlist restructuring (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 263MB peak: 263MB) Some data will not be shown as it is part of encrypted module Clock Summary ****************** Start Requested Requested Clock Clock Clock Level Clock Frequency Period Type Group Load ------------------------------------------------------------------------------------------------------------------- 0 - System 1.0 MHz 1000.000 system system_clkgroup 0 0 - Top|CLK 1.0 MHz 1000.000 inferred (multiple) 595 0 - Top|jtck_inferred_clock 1.0 MHz 1000.000 inferred (multiple) 446 0 - CE_Sync_uniq_0|clko_inferred_clock 1.0 MHz 1000.000 inferred (multiple) 68 =================================================================================================================== Clock Load Summary *********************** Clock Source Clock Pin Non-clock Pin Non-clock Pin Clock Load Pin Seq Example Seq Example Comb Example ------------------------------------------------------------------------------------------------------------------------------- System 0 - - - - Top|CLK 595 OSCA001.HFCLKOUT(OSCA) CE001.CE1.C - - Top|jtck_inferred_clock 446 jtaghub_inst.JTCK(JTAGH19) - - - CE_Sync_uniq_0|clko_inferred_clock 68 CE001.DCC01.CLKO(DCC) LED1.C - - =============================================================================================================================== @W: MT530 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\cnt_uniq_0.vhd":51:8:51:9|Found inferred clock CE_Sync_uniq_0|clko_inferred_clock which controls 68 sequential elements including CNT01.Couti[15:0]. This clock has no specified timing constraint which may adversely impact design performance. @W: MT530 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\ce_sync_uniq_0.vhd":30:8:30:9|Found inferred clock Top|CLK which controls 595 sequential elements including CE001.CE. This clock has no specified timing constraint which may adversely impact design performance. ICG Latch Removal Summary: Number of ICG latches removed: 0 Number of ICG latches not removed: 0 @S |Clock Optimization Summary #### START OF PREMAP CLOCK OPTIMIZATION REPORT #####[ 3 non-gated/non-generated clock tree(s) driving 1033 clock pin(s) of sequential element(s) 0 gated/generated clock tree(s) driving 0 clock pin(s) of sequential element(s) 0 instances converted, 0 sequential instances remain driven by gated/generated clocks ============================ Non-Gated/Non-Generated Clocks ============================= Clock Tree ID Driving Element Drive Element Type Fanout Sample Instance ----------------------------------------------------------------------------------------- @KP:ckid0_0 jtaghub_inst.JTCK JTAGH19 446 ENCRYPTED @KP:ckid0_1 OSCA001.HFCLKOUT OSCA 519 CE001.CE @KP:ckid0_3 CE001.DCC01.CLKO DCC 68 LED4 ========================================================================================= ##### END OF CLOCK OPTIMIZATION REPORT ###### Summary of user generated gated clocks: 0 user generated gated/generated clock tree(s) driving 0 clock pin(s) of sequential element(s) @N: FX1143 |Skipping assigning INTERNAL_VREF to iobanks, because the table of mapping from pin to iobank is not initialized. Finished Pre Mapping Phase. Starting constraint checker (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 263MB peak: 264MB) Finished constraint checker preprocessing (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 264MB peak: 264MB) Finished constraint checker (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 265MB peak: 265MB) Pre-mapping successful! At Mapper Exit (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 175MB peak: 266MB) Process took 0h:00m:02s realtime, 0h:00m:02s cputime # Thu Sep 5 14:20:49 2024 ###########################################################] Map & Optimize Report # Thu Sep 5 14:20:50 2024 Copyright (C) 1994-2023 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: V-2023.09LR-1 Install: C:\lscc\radiant\2024.1\synpbase OS: Windows 10 or later Hostname: LPGL109135 Implementation : imp1 Synopsys Lattice Technology Mapper, Version map202309lat, Build 101R, Built May 14 2024 08:42:08, @ Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 182MB peak: 182MB) @N: MF916 |Option synthesis_strategy=base is enabled. @N: MF248 |Running in 64-bit mode. @N: MF667 |Clock conversion disabled. (Command "set_option -fix_gated_and_generated_clocks 0" in the project file.) Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 185MB peak: 198MB) Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 185MB peak: 198MB) Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 200MB peak: 200MB) Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:01s; Memory used current: 201MB peak: 203MB) Starting Optimization and Mapping (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 257MB peak: 257MB) @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CLK has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CLK1 has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[0] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[1] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[2] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[3] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[4] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[5] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[6] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[7] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[8] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[9] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[10] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[11] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[12] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[13] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[14] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT1[15] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[0] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[1] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[2] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[3] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[4] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[5] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[6] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[7] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[8] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[9] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[10] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[11] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[12] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[13] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[14] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT2[15] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[0] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[1] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[2] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[3] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[4] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[5] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[6] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[7] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[8] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[9] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[10] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[11] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[12] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[13] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[14] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT3[15] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[0] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[1] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[2] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[3] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[4] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[5] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[6] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[7] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[8] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[9] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[10] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[11] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[12] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[13] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[14] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net CNT4[15] has multiple drivers . @W: BN161 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":6:7:6:9|Net jtck has multiple drivers . Finished RTL optimizations (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 262MB peak: 262MB) @N: MO231 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\cnt_uniq_3.vhd":51:8:51:9|Found counter in view:work.Top(behave) instance CNT04.Couti[15:0] @N: MO231 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\cnt_uniq_2.vhd":51:8:51:9|Found counter in view:work.Top(behave) instance CNT03.Couti[15:0] @N: MO231 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\cnt_uniq_1.vhd":51:8:51:9|Found counter in view:work.Top(behave) instance CNT02.Couti[15:0] @N: MO231 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\cnt_uniq_0.vhd":51:8:51:9|Found counter in view:work.Top(behave) instance CNT01.Couti[15:0] @N: MF794 |RAM event_cntr_reg_1[2:0] required 3 registers during mapping @N: MF794 |RAM genblk1\.te_tt_dist_ram.mem[7:0] required 24 registers during mapping Starting factoring (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 269MB peak: 269MB) Finished factoring (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 272MB peak: 272MB) Available hyper_sources - for debug and ip models None Found NConnInternalConnection caching is on Finished generic timing optimizations - Pass 1 (Real Time elapsed 0h:00m:03s; CPU Time elapsed 0h:00m:03s; Memory used current: 281MB peak: 281MB) Starting Early Timing Optimization (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 281MB peak: 282MB) Finished Early Timing Optimization (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 281MB peak: 282MB) Finished generic timing optimizations - Pass 2 (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 281MB peak: 282MB) Finished preparing to map (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 281MB peak: 282MB) Finished technology mapping (Real Time elapsed 0h:00m:05s; CPU Time elapsed 0h:00m:05s; Memory used current: 296MB peak: 296MB) Pass CPU time Worst Slack Luts / Registers ------------------------------------------------------------ 1 0h:00m:05s 994.47ns 1089 / 1044 Finished technology timing optimizations and critical path resynthesis (Real Time elapsed 0h:00m:05s; CPU Time elapsed 0h:00m:05s; Memory used current: 296MB peak: 297MB) @N: FX164 |The option to pack registers in the IOB has not been specified. Please set syn_useioff attribute. Finished restoring hierarchy (Real Time elapsed 0h:00m:06s; CPU Time elapsed 0h:00m:06s; Memory used current: 297MB peak: 297MB) Starting CDBProcessSetClockGroups... (Real Time elapsed 0h:00m:06s; CPU Time elapsed 0h:00m:06s; Memory used current: 297MB peak: 298MB) Finished with CDBProcessSetClockGroups (Real Time elapsed 0h:00m:06s; CPU Time elapsed 0h:00m:06s; Memory used current: 297MB peak: 298MB) Start Writing Netlists (Real Time elapsed 0h:00m:06s; CPU Time elapsed 0h:00m:06s; Memory used current: 239MB peak: 298MB) Writing Analyst data base C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\imp1\synwork\LAB04_imp1_m.srm Finished Writing Netlist Databases (Real Time elapsed 0h:00m:07s; CPU Time elapsed 0h:00m:07s; Memory used current: 297MB peak: 298MB) Writing Verilog Simulation files Writing scf file... (Real Time elapsed 0h:00m:07s; CPU Time elapsed 0h:00m:07s; Memory used current: 300MB peak: 300MB) @N: BW103 |The default time unit for the Synopsys Constraint File (SDC or FDC) is 1ns. @N: BW107 |Synopsys Constraint File capacitance units using default value of 1pF Finished Writing Verilog Simulation files (Real Time elapsed 0h:00m:07s; CPU Time elapsed 0h:00m:07s; Memory used current: 300MB peak: 301MB) Finished Writing Netlists (Real Time elapsed 0h:00m:07s; CPU Time elapsed 0h:00m:07s; Memory used current: 300MB peak: 301MB) Start final timing analysis (Real Time elapsed 0h:00m:08s; CPU Time elapsed 0h:00m:08s; Memory used current: 295MB peak: 301MB) @W: MT246 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":314:4:314:15|Blackbox JTAGH19 is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) @W: MT246 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\top.vhd":249:4:249:10|Blackbox OSCA is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) @W: MT246 :"c:\users\qnoor\downloads\lab02_prop_circuit_arst\lab02_prop_circuit_arst\imp1\reveal_workspace\tmpreveal\ce_sync_uniq_0.vhd":23:4:23:8|Blackbox DCC is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) @W: MT420 |Found inferred clock CE_Sync_uniq_0|clko_inferred_clock with period 1000.00ns. Please declare a user-defined clock on net CE001.CLK1. @W: MT420 |Found inferred clock Top|jtck_inferred_clock with period 1000.00ns. Please declare a user-defined clock on net jtck. @W: MT420 |Found inferred clock Top|CLK with period 1000.00ns. Please declare a user-defined clock on net CLK. ##### START OF TIMING REPORT #####[ # Timing report written on Thu Sep 5 14:20:58 2024 # Top view: Top Requested Frequency: 1.0 MHz Wire load mode: top Paths requested: 5 Constraint File(s): C:\lscc\radiant\2024.1\scripts\tcl\flow\radiant_synplify_vars.tcl C:\Users\qnoor\Downloads\LAB02_Prop_Circuit_ARST\LAB02_Prop_Circuit_ARST\source\imp1\timingsdc.sdc @N: MT320 |This timing report is an estimate of place and route data. For final timing results, use the FPGA vendor place and route report. @N: MT322 |Clock constraints include only register-to-register paths associated with each individual clock. Performance Summary ******************* Worst slack in design: 994.377 Requested Estimated Requested Estimated Clock Clock Starting Clock Frequency Frequency Period Period Slack Type Group --------------------------------------------------------------------------------------------------------------------------------------- CE_Sync_uniq_0|clko_inferred_clock 1.0 MHz 396.4 MHz 1000.000 2.522 997.477 inferred (multiple) Top|CLK 1.0 MHz 220.0 MHz 1000.000 4.545 995.456 inferred (multiple) Top|jtck_inferred_clock 1.0 MHz 177.8 MHz 1000.000 5.623 994.377 inferred (multiple) System 1.0 MHz 334.6 MHz 1000.000 2.989 997.011 system system_clkgroup ======================================================================================================================================= Clock Relationships ******************* Clocks | rise to rise | fall to fall | rise to fall | fall to rise ---------------------------------------------------------------------------------------------------------------------------------------------------------------------- Starting Ending | constraint slack | constraint slack | constraint slack | constraint slack ---------------------------------------------------------------------------------------------------------------------------------------------------------------------- System System | 1000.000 997.012 | No paths - | No paths - | No paths - System Top|jtck_inferred_clock | No paths - | No paths - | 1000.000 995.412 | No paths - System Top|CLK | 1000.000 996.396 | No paths - | No paths - | No paths - CE_Sync_uniq_0|clko_inferred_clock CE_Sync_uniq_0|clko_inferred_clock | 1000.000 997.478 | No paths - | No paths - | No paths - CE_Sync_uniq_0|clko_inferred_clock Top|CLK | Diff grp - | No paths - | No paths - | No paths - Top|jtck_inferred_clock System | No paths - | No paths - | No paths - | 1000.000 995.977 Top|jtck_inferred_clock Top|jtck_inferred_clock | No paths - | 1000.000 994.377 | No paths - | No paths - Top|jtck_inferred_clock Top|CLK | No paths - | No paths - | No paths - | Diff grp - Top|CLK System | 1000.000 995.896 | No paths - | No paths - | No paths - Top|CLK Top|jtck_inferred_clock | No paths - | No paths - | Diff grp - | No paths - Top|CLK Top|CLK | 1000.000 995.456 | No paths - | No paths - | No paths - ====================================================================================================================================================================== Note: 'No paths' indicates there are no paths in the design for that pair of clock edges. 'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups. Interface Information ********************* No IO constraint found ==================================== Detailed Report for Clock: CE_Sync_uniq_0|clko_inferred_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock --------------------------------------------------------------------------------------------------------------- CNT04.Couti[0] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX Q CNT4_1[0] 0.863 997.477 CNT01.Couti[0] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX Q CNT1_1[0] 0.863 997.477 CNT02.Couti[0] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX Q CNT2_1[0] 0.863 997.477 CNT03.Couti[0] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX Q CNT3_1[0] 0.863 997.477 CNT03.Couti[1] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX Q CNT3_1[1] 0.838 997.562 CNT04.Couti[1] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX Q CNT4_1[1] 0.838 997.562 CNT01.Couti[1] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX Q CNT1_1[1] 0.838 997.562 CNT02.Couti[1] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX Q CNT2_1[1] 0.838 997.562 CNT02.Couti[2] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX Q CNT2_1[2] 0.838 997.562 CNT03.Couti[2] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX Q CNT3_1[2] 0.838 997.562 =============================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------------- CNT02.Couti[15] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX D Couti_s[15] 1000.144 997.477 CNT03.Couti[15] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX D Couti_s[15] 1000.144 997.477 CNT01.Couti[15] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX D Couti_s[15] 1000.144 997.477 CNT04.Couti[15] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX D Couti_s[15] 1000.144 997.477 CNT03.Couti[13] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX D Couti_s[13] 1000.144 997.537 CNT01.Couti[13] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX D Couti_s[13] 1000.144 997.537 CNT04.Couti[13] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX D Couti_s[13] 1000.144 997.537 CNT02.Couti[13] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX D Couti_s[13] 1000.144 997.537 CNT01.Couti[14] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX D Couti_s[14] 1000.144 997.537 CNT02.Couti[14] CE_Sync_uniq_0|clko_inferred_clock FD1P3DX D Couti_s[14] 1000.144 997.537 =================================================================================================================== Worst Path Information *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: -0.144 + Clock delay at ending point: 0.000 (ideal) = Required time: 1000.144 - Propagation time: 2.667 - Clock delay at starting point: 0.000 (ideal) = Slack (non-critical) : 997.477 Number of logic level(s): 9 Starting point: CNT04.Couti[0] / Q Ending point: CNT04.Couti[15] / D The start point is clocked by CE_Sync_uniq_0|clko_inferred_clock [rising] (rise=0.000 fall=500.000 period=1000.000) on pin CK The end point is clocked by CE_Sync_uniq_0|clko_inferred_clock [rising] (rise=0.000 fall=500.000 period=1000.000) on pin CK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) --------------------------------------------------------------------------------------- CNT04.Couti[0] FD1P3DX Q Out 0.863 0.863 r - CNT4_1[0] Net - - - - 4 CNT04.Couti_cry_0[0] CCU2 A1 In 0.000 0.863 r - CNT04.Couti_cry_0[0] CCU2 COUT Out 0.784 1.647 r - Couti_cry[0] Net - - - - 1 CNT04.Couti_cry_0[1] CCU2 CIN In 0.000 1.647 r - CNT04.Couti_cry_0[1] CCU2 COUT Out 0.059 1.706 r - Couti_cry[2] Net - - - - 1 CNT04.Couti_cry_0[3] CCU2 CIN In 0.000 1.706 r - CNT04.Couti_cry_0[3] CCU2 COUT Out 0.059 1.765 r - Couti_cry[4] Net - - - - 1 CNT04.Couti_cry_0[5] CCU2 CIN In 0.000 1.765 r - CNT04.Couti_cry_0[5] CCU2 COUT Out 0.059 1.824 r - Couti_cry[6] Net - - - - 1 CNT04.Couti_cry_0[7] CCU2 CIN In 0.000 1.824 r - CNT04.Couti_cry_0[7] CCU2 COUT Out 0.059 1.883 r - Couti_cry[8] Net - - - - 1 CNT04.Couti_cry_0[9] CCU2 CIN In 0.000 1.883 r - CNT04.Couti_cry_0[9] CCU2 COUT Out 0.059 1.942 r - Couti_cry[10] Net - - - - 1 CNT04.Couti_cry_0[11] CCU2 CIN In 0.000 1.942 r - CNT04.Couti_cry_0[11] CCU2 COUT Out 0.059 2.001 r - Couti_cry[12] Net - - - - 1 CNT04.Couti_cry_0[13] CCU2 CIN In 0.000 2.001 r - CNT04.Couti_cry_0[13] CCU2 COUT Out 0.059 2.060 r - Couti_cry[14] Net - - - - 1 CNT04.Couti_s_0[15] CCU2 CIN In 0.000 2.060 r - CNT04.Couti_s_0[15] CCU2 S0 Out 0.607 2.667 r - Couti_s[15] Net - - - - 1 CNT04.Couti[15] FD1P3DX D In 0.000 2.667 r - ======================================================================================= ==================================== Detailed Report for Clock: Top|CLK ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------- encrypted Top|CLK FD1P3DX Q eLLu99aJ5Bmnc41207J 0.941 995.456 encrypted Top|CLK FD1P3DX Q o1sr1Dpc5y5BnGpsJpibGI3 0.863 995.518 encrypted Top|CLK FD1P3DX Q o1sr1Dpc5y5BnGpsJpibHbJ 0.838 995.543 encrypted Top|CLK FD1P3DX Q c8pHcEsIxIrb 0.883 995.895 encrypted Top|CLK FD1P3DX Q c8pHcEsIxIrb 0.883 995.895 encrypted Top|CLK FD1P3DX Q c8pHcEsIxIrb 0.883 995.895 encrypted Top|CLK FD1P3DX Q c8pHcEsIxIrb 0.883 995.895 encrypted Top|CLK FD1P3DX Q by1JGvCJzf7h084gCtcbCwbI3 0.838 995.941 encrypted Top|CLK FD1P3DX Q by1JGvCJzf7h084gCtcbCwbI3 0.838 995.941 encrypted Top|CLK FD1P3DX Q by1JGvCJzf7h084gCtcbCwbI3 0.838 995.941 ================================================================================================= Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock --------------------------------------------------------------------------------------------------------------- encrypted Top|CLK FD1P3DX D nG0FpAGr2fkAKAG0nfun923 999.789 995.456 encrypted Top|CLK FD1P3DX D nG0FpAGr2fkAKAG0nfun97J 999.789 995.456 encrypted Top|CLK FD1P3DX D nG0FpAGr2fkAKAG0nfun9Dn 999.789 995.456 encrypted Top|CLK FD1P3DX D bbJitcd5xrk5BIHJlIu0yyD21KrJ 999.789 995.495 encrypted Top|CLK FD1P3DX D bbJitcd5xrk5BIHJlIu0yyD21Kxn 999.789 995.495 encrypted Top|CLK FD1P3DX SP ba8eq0toDDLcz2xAv8Axeuga65ajemFwH6Ficb 999.817 995.518 encrypted Top|CLK FD1P3DX SP ba8eq0toDDLcz2xAv8Axeuga65ajemFwH6Ficb 999.817 995.518 encrypted Top|CLK FD1P3DX SP ba8eq0toDDLcz2xAv8Axeuga65ajemFwH6Ficb 999.817 995.518 encrypted Top|CLK FD1P3DX SP ba8eq0toDDLcz2xAv8Axeuga65ajemFwH6Ficb 999.817 995.518 encrypted Top|CLK FD1P3DX SP ba8eq0toDDLcz2xAv8Axeuga65ajemFwH6Ficb 999.817 995.518 =============================================================================================================== Worst Path Information *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 0.211 + Clock delay at ending point: 0.000 (ideal) = Required time: 999.789 - Propagation time: 4.333 - Clock delay at starting point: 0.000 (ideal) = Slack (non-critical) : 995.456 Number of logic level(s): 6 Starting point: encrypted / Q Ending point: encrypted / D The start point is clocked by Top|CLK [rising] (rise=0.000 fall=500.000 period=1000.000) on pin CK The end point is clocked by Top|CLK [rising] (rise=0.000 fall=500.000 period=1000.000) on pin CK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ----------------------------------------------------------------------------------------------- encrypted FD1P3DX Q Out 0.941 0.941 r - eLLu99aJ5Bmnc41207J Net - - - - 18 encrypted LUT4 C In 0.000 0.941 r - encrypted LUT4 Z Out 0.523 1.464 r - cKgGbyr271p2HalK45ancu Net - - - - 1 encrypted LUT4 A In 0.000 1.464 r - encrypted LUT4 Z Out 0.693 2.156 r - f0kwkFfyeAhG23zmgs7s1ILf7amD1 Net - - - - 12 encrypted LUT4 C In 0.000 2.156 r - encrypted LUT4 Z Out 0.703 2.860 r - bbHKib8byGBwLrz9njvAq3LbKx8u Net - - - - 15 encrypted LUT4 A In 0.000 2.860 r - encrypted LUT4 Z Out 0.523 3.382 f - qdwhakvykjcE27il4y5uFre Net - - - - 1 encrypted LUT4 D In 0.000 3.382 f - encrypted LUT4 Z Out 0.608 3.990 f - jzhBI1241n2jK8aKt1kKDmrtwr Net - - - - 3 encrypted LUT4 D In 0.000 3.990 f - encrypted LUT4 Z Out 0.343 4.333 f - nG0FpAGr2fkAKAG0nfun923 Net - - - - 1 encrypted FD1P3DX D In 0.000 4.333 f - =============================================================================================== ==================================== Detailed Report for Clock: Top|jtck_inferred_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------- encrypted Top|jtck_inferred_clock FD1P3DX Q ngfjhruLu9jrb 1.034 994.377 encrypted Top|jtck_inferred_clock FD1P3DX Q bq8Ch6i62mg5yI3 0.798 994.832 encrypted Top|jtck_inferred_clock FD1P3DX Q bq8Ch6i62mg5zbJ 0.798 994.832 encrypted Top|jtck_inferred_clock FD1P3DX Q bq8Ch6i62mg5zhn 0.798 994.832 encrypted Top|jtck_inferred_clock FD1P3DX Q bq8Ch6i62mg5zm3 0.798 994.832 encrypted Top|jtck_inferred_clock FD1P3DX Q JrykuKumiJldlLyI3 0.798 994.965 encrypted Top|jtck_inferred_clock FD1P3DX Q JrykuKumiJldlLzbJ 0.798 994.965 encrypted Top|jtck_inferred_clock FD1P3DX Q JrykuKumiJldlLzhn 0.798 994.965 encrypted Top|jtck_inferred_clock FD1P3DX Q JrykuKumiJldlLzm3 0.798 994.965 encrypted Top|jtck_inferred_clock FD1P3DX Q JrykuKumiJldlLzrJ 0.798 994.965 ======================================================================================================= Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock --------------------------------------------------------------------------------------------------------------------- encrypted Top|jtck_inferred_clock FD1P3DX D eF29acFIhhC9Hpr3ECv 999.789 994.377 encrypted Top|jtck_inferred_clock FD1P3DX D 3EEGnDuv6vAaw6eon7tLKmpbaJrG7J 999.789 994.965 encrypted Top|jtck_inferred_clock FD1P3DX D 3EEGnDuv6vAaw6eon7tLKmpbaJrGDn 999.789 994.965 encrypted Top|jtck_inferred_clock FD1P3DX D 3EEGnDuv6vAaw6eon7tLKmpbaJrGI3 999.789 994.965 encrypted Top|jtck_inferred_clock FD1P3DX D 3EEGnDuv6vAaw6eon7tLKmpbaJrHbJ 999.789 994.965 encrypted Top|jtck_inferred_clock FD1P3DX D 3EEGnDuv6vAaw6eon7tLKmpbaJrHhn 999.789 994.965 encrypted Top|jtck_inferred_clock FD1P3DX D f255I2sEdedAemaC61m9L6oD596bJ 999.789 995.164 encrypted Top|jtck_inferred_clock FD1P3DX D f255I2sEdedAemaC61m9L6oD596hn 999.789 995.164 encrypted Top|jtck_inferred_clock FD1P3DX D f255I2sEdedAemaC61m9L6oD596m3 999.789 995.164 encrypted Top|jtck_inferred_clock FD1P3DX D f255I2sEdedAemaC61m9L6oD596rJ 999.789 995.164 ===================================================================================================================== Worst Path Information *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 0.211 + Clock delay at ending point: 0.000 (ideal) = Required time: 999.789 - Propagation time: 5.412 - Clock delay at starting point: 0.000 (ideal) = Slack (critical) : 994.377 Number of logic level(s): 8 Starting point: encrypted / Q Ending point: encrypted / D The start point is clocked by Top|jtck_inferred_clock [falling] (rise=0.000 fall=500.000 period=1000.000) on pin CK The end point is clocked by Top|jtck_inferred_clock [falling] (rise=0.000 fall=500.000 period=1000.000) on pin CK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ---------------------------------------------------------------------------------------- encrypted FD1P3DX Q Out 1.034 1.034 r - ngfjhruLu9jrb Net - - - - 93 encrypted LUT4 A In 0.000 1.034 r - encrypted LUT4 Z Out 0.742 1.776 f - brrsbLf6AoEnFss Net - - - - 33 encrypted LUT4 C In 0.000 1.776 f - encrypted LUT4 Z Out 0.568 2.344 r - 1zb20HB Net - - - - 2 encrypted LUT4 A In 0.000 2.344 r - encrypted LUT4 Z Out 0.523 2.867 r - fh7pgr Net - - - - 1 encrypted LUT4 B In 0.000 2.867 r - encrypted LUT4 Z Out 0.523 3.390 r - hBt88DkGpoAJ4vl6 Net - - - - 1 encrypted LUT4 C In 0.000 3.390 r - encrypted LUT4 Z Out 0.633 4.023 r - hav1h5 Net - - - - 4 encrypted LUT4 A In 0.000 4.023 r - encrypted LUT4 Z Out 0.523 4.546 r - eF29acFIhhC9Hpr3ECs Net - - - - 1 encrypted LUT4 C In 0.000 4.546 r - encrypted LUT4 Z Out 0.523 5.069 r - cGu1EIr9cwttxGGvl9jfmJ Net - - - - 1 encrypted LUT4 B In 0.000 5.069 r - encrypted LUT4 Z Out 0.343 5.412 r - eF29acFIhhC9Hpr3ECv Net - - - - 1 encrypted FD1P3DX D In 0.000 5.412 r - ======================================================================================== ==================================== Detailed Report for Clock: System ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock --------------------------------------------------------------------------------------------------------------------------- jtaghub_inst System JTAGH19 JCE2 jce2 0.000 995.412 jtaghub_inst System JTAGH19 JSHIFT jshift 0.000 995.412 encrypted System WIDEFN9 Z 1zb4q7e 0.000 996.396 encrypted System WIDEFN9 Z 1zb4I7j 0.000 996.396 jtaghub_inst System JTAGH19 IP_ENABLE[0] ip_enable[0] 0.000 996.721 encrypted System WIDEFN9 Z 1zb3hwz 0.000 997.224 encrypted System WIDEFN9 Z 1zb3h18 0.000 997.224 encrypted System WIDEFN9 Z fh7oCz 0.000 997.244 encrypted System WIDEFN9 Z ftBDimCLevkJyxK8kJiKvdbgBaj1K95FBIwwbDn 0.000 997.877 encrypted System WIDEFN9 Z 1zb2118 0.000 997.877 =========================================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------ encrypted System FD1P3DX D eF29acFIhhC9Hpr3ECv 999.789 995.412 encrypted System FD1P3DX D nG0FpAGr2fkAKAG0nfun923 999.789 996.396 encrypted System FD1P3DX D nG0FpAGr2fkAKAG0nfun97J 999.789 996.396 encrypted System FD1P3DX D nG0FpAGr2fkAKAG0nfun9Dn 999.789 996.396 encrypted System FD1P3DX D bbJitcd5xrk5BIHJlIu0yyD21KrJ 999.789 996.436 encrypted System FD1P3DX D bbJitcd5xrk5BIHJlIu0yyD21Kxn 999.789 996.436 encrypted System FD1P3BX D iysCylwjcK5ibG7J 999.789 996.457 encrypted System FD1P3DX D f2242iptfGG54FCF82lLaCym5Jhxn 999.789 996.875 encrypted System FD1P3DX D f2242iptfGG54FCF82lLaCym5Jh23 999.789 996.875 encrypted System FD1P3DX D cKkpE8KB8DFctqqsqnAFbJ 999.789 996.959 ====================================================================================================== Worst Path Information *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 0.211 + Clock delay at ending point: 0.000 (ideal) = Required time: 999.789 - Propagation time: 4.378 - Clock delay at starting point: 0.000 (ideal) - Estimated clock delay at start point: -0.000 = Slack (non-critical) : 995.411 Number of logic level(s): 8 Starting point: jtaghub_inst / JCE2 Ending point: encrypted / D The start point is clocked by System [rising] The end point is clocked by Top|jtck_inferred_clock [falling] (rise=0.000 fall=500.000 period=1000.000) on pin CK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ---------------------------------------------------------------------------------------- jtaghub_inst JTAGH19 JCE2 Out 0.000 0.000 r - jce2 Net - - - - 11 encrypted LUT4 C In 0.000 0.000 r - encrypted LUT4 Z Out 0.742 0.742 r - brrsbLf6AoEnFss Net - - - - 33 encrypted LUT4 C In 0.000 0.742 r - encrypted LUT4 Z Out 0.568 1.310 f - 1zb20HB Net - - - - 2 encrypted LUT4 A In 0.000 1.310 f - encrypted LUT4 Z Out 0.523 1.833 f - fh7pgr Net - - - - 1 encrypted LUT4 B In 0.000 1.833 f - encrypted LUT4 Z Out 0.523 2.356 f - hBt88DkGpoAJ4vl6 Net - - - - 1 encrypted LUT4 C In 0.000 2.356 f - encrypted LUT4 Z Out 0.633 2.989 f - hav1h5 Net - - - - 4 encrypted LUT4 A In 0.000 2.989 f - encrypted LUT4 Z Out 0.523 3.511 r - eF29acFIhhC9Hpr3ECs Net - - - - 1 encrypted LUT4 C In 0.000 3.511 r - encrypted LUT4 Z Out 0.523 4.035 r - cGu1EIr9cwttxGGvl9jfmJ Net - - - - 1 encrypted LUT4 B In 0.000 4.035 r - encrypted LUT4 Z Out 0.343 4.378 r - eF29acFIhhC9Hpr3ECv Net - - - - 1 encrypted FD1P3DX D In 0.000 4.378 r - ======================================================================================== ##### END OF TIMING REPORT #####] Timing exceptions that could not be applied Finished final timing analysis (Real Time elapsed 0h:00m:08s; CPU Time elapsed 0h:00m:08s; Memory used current: 297MB peak: 301MB) Finished timing report (Real Time elapsed 0h:00m:08s; CPU Time elapsed 0h:00m:08s; Memory used current: 297MB peak: 301MB) --------------------------------------- Resource Usage Report Part: lfcpnx_100-9 Register bits: 1044 of 79872 (1%) PIC Latch: 0 I/O cells: 5 Details: CCU2: 124 DCC: 1 DPR16X4: 40 FD1P3BX: 37 FD1P3DX: 910 FD1P3IX: 93 GSR: 1 IB: 1 INV: 20 JTAGH19: 1 LUT4: 980 OB: 4 OFD1P3IX: 4 OSCA: 1 VHI: 23 VLO: 23 WIDEFN9: 68 Resource Usage inside macros: Registers: 0 LUTs: 0 EBRs: 0 LRAMs: 0 DSPs: 0 Distributed RAMs: 0 Carry Chains: 0 Blackboxes: 0 Mapping Summary: Total number of registers: 1044 + 0 = 1044 of 79872 (1.31%) Total number of LUTs: 980 + 0 = 980 Total number of EBRs: 0 + 0 = 0 of 208 (0.00%) Total number of LRAMs: 0 + 0 = 0 of 7 (0.00%) Total number of DSPs: 0 + 0 = 0 of 156 (0.00%) Total number of Distributed RAMs: 40 + 0 = 40 Total number of Carry Chains: 124 + 0 = 124 Total number of BlackBoxes: 50 + 0 = 50 Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:08s; CPU Time elapsed 0h:00m:08s; Memory used current: 133MB peak: 301MB) Process took 0h:00m:08s realtime, 0h:00m:08s cputime # Thu Sep 5 14:20:58 2024 ###########################################################]