pn240821141802 #Start recording tcl command: 8/21/2024 09:50:23 #Project Location: D:/02_LSCC/13_VHDL/LAB05/LAB05; Project name: LAB05 prj_create -name "LAB05" -impl "impl_1" -dev LFCPNX-100-9LFG672C -performance "9_High-Performance_1.0V" -synthesis "synplify" file copy -force -- "D:/02_LSCC/13_VHDL/LAB01/LAB01/source/impl_1/Decoder_7Seg.vhd" "D:/02_LSCC/13_VHDL/LAB03/LAB03/source/impl_1/CNT24.vhd" "D:/02_LSCC/13_VHDL/LAB04/LAB04/source/impl_1/FSM.vhd" "D:/zz_MZ_test/test01/source/impl_1/top.vhd" "D:/02_LSCC/13_VHDL/LAB05/LAB05/source/impl_1" prj_add_source "D:/02_LSCC/13_VHDL/LAB05/LAB05/source/impl_1/Decoder_7Seg.vhd" "D:/02_LSCC/13_VHDL/LAB05/LAB05/source/impl_1/CNT24.vhd" "D:/02_LSCC/13_VHDL/LAB05/LAB05/source/impl_1/FSM.vhd" "D:/02_LSCC/13_VHDL/LAB05/LAB05/source/impl_1/top.vhd" prj_save file copy -force -- "D:/zz_MZ_test/test01/source/impl_1/MyPackage.vhd" "D:/02_LSCC/13_VHDL/LAB05/LAB05/source/impl_1" prj_add_source "D:/02_LSCC/13_VHDL/LAB05/LAB05/source/impl_1/MyPackage.vhd" prj_run Synthesis -impl impl_1 prj_disable_source "D:/02_LSCC/13_VHDL/LAB05/LAB05/source/impl_1/Decoder_7Seg.vhd" prj_remove_source "D:/02_LSCC/13_VHDL/LAB05/LAB05/source/impl_1/Decoder_7Seg.vhd" prj_add_source "D:/02_LSCC/13_VHDL/LAB05/LAB05/source/impl_1/Decoder_7Seg.vhd" source "D:/02_LSCC/13_VHDL/LAB05/LAB05/hdle_generate_tbtemplate.tcl" prj_add_source -simulate_only "top_level_tb.vhd" source "D:/02_LSCC/13_VHDL/LAB05/LAB05/hdle_generate_tbtemplate.tcl" prj_add_source "D:/02_LSCC/13_VHDL/LAB05/LAB05/Sim001/Sim001.spf" file copy -force -- "D:/zz_MZ_test/test01/myPDC.pdc" "D:/02_LSCC/13_VHDL/LAB05/LAB05/source/impl_1" prj_add_source "D:/02_LSCC/13_VHDL/LAB05/LAB05/source/impl_1/myPDC.pdc" prj_run Export -impl impl_1 launch_programmer_prj "C:/lscc/radiant/2023.2" prj_run Export -impl impl_1 prj_run Export -impl impl_1 prj_run Export -impl impl_1 prj_disable_source "D:/02_LSCC/13_VHDL/LAB05/LAB05/source/impl_1/Decoder_7Seg.vhd" prj_run Export -impl impl_1 prj_enable_source "D:/02_LSCC/13_VHDL/LAB05/LAB05/source/impl_1/Decoder_7Seg.vhd" prj_run Export -impl impl_1 prj_run Export -impl impl_1 prj_run Export -impl impl_1 prj_run Export -impl impl_1 #Stop recording: 8/21/2024 14:18:02 pn240821143630 #Start recording tcl command: 8/21/2024 14:25:01 #Project Location: D:/02_LSCC/13_VHDL/LAB05/LAB05; Project name: LAB05 prj_open "D:/02_LSCC/13_VHDL/LAB05/LAB05/LAB05.rdf" #Stop recording: 8/21/2024 14:36:30 pn240826114543 #Start recording tcl command: 8/26/2024 09:18:22 #Project Location: D:/02_LSCC/13_VHDL/LAB05/LAB05; Project name: LAB05 prj_open "D:/02_LSCC/13_VHDL/LAB05/LAB05/LAB05.rdf" prj_set_impl_opt synthesis "lse" prj_run Synthesis -impl impl_1 prj_set_impl_opt synthesis "synplify" prj_run Synthesis -impl impl_1 prj_save prj_close #Stop recording: 8/26/2024 11:45:43 pn240826143654 #Start recording tcl command: 8/26/2024 11:45:59 #Project Location: D:/02_LSCC/13_VHDL/LAB05/LAB05; Project name: LAB05 prj_open "D:/02_LSCC/13_VHDL/LAB05/LAB05/LAB05.rdf" prj_run Synthesis -impl impl_1 prj_add_source "D:/02_LSCC/13_VHDL/LAB05/LAB05/MySDC.sdc" prj_enable_source "D:/02_LSCC/13_VHDL/LAB05/LAB05/MySDC.sdc" prj_run Export -impl impl_1 prj_save prj_close #Stop recording: 8/26/2024 14:36:54 pn240826144858 #Start recording tcl command: 8/26/2024 14:38:16 #Project Location: D:/02_LSCC/13_VHDL/LAB05/LAB05; Project name: LAB05 prj_open "D:/02_LSCC/13_VHDL/LAB05/LAB05/LAB05.rdf" prj_run Synthesis -impl impl_1 prj_run Export -impl impl_1 launch_programmer_prj "C:/lscc/radiant/2023.2" prj_run Synthesis -impl impl_1 prj_run Map -impl impl_1 prj_run PAR -impl impl_1 prj_run Export -impl impl_1 prj_close #Stop recording: 8/26/2024 14:48:58 pn240826145239 #Start recording tcl command: 8/26/2024 14:50:01 #Project Location: D:/02_LSCC/13_VHDL/LAB05/LAB05; Project name: LAB05 prj_open "D:/02_LSCC/13_VHDL/LAB05/LAB05/LAB05.rdf" prj_run Synthesis -impl impl_1 prj_save prj_close #Stop recording: 8/26/2024 14:52:39 pn240826150919 #Start recording tcl command: 8/26/2024 14:53:13 #Project Location: D:/02_LSCC/13_VHDL/LAB05/LAB05; Project name: LAB05 prj_open "D:/02_LSCC/13_VHDL/LAB05/LAB05/LAB05.rdf" prj_run Synthesis -impl impl_1 prj_run Export -impl impl_1 launch_programmer_prj "C:/lscc/radiant/2023.2" prj_run Synthesis -impl impl_1 prj_run Export -impl impl_1 prj_save prj_close #Stop recording: 8/26/2024 15:09:19