Lattice Mapping Report File

Design:  top
Family:  LIFCL
Device:  LIFCL-17
Package: QFN72
Performance Grade:  9_High-Performance_1.0V

Mapper:    version Radiant Software (64-bit) 2023.2.1.288.0
Mapped on: Wed Jun  5 12:16:41 2024

Design Information

Command line:   map -i lab03_impl_1_syn.udb -o lab03_impl_1_map.udb -mp
     lab03_impl_1.mrp -hierrpt -gui -msgset C:/Users/ssyahril/Downloads/FAE_F2F_
     Training_Labs_V2/FAE_F2F_Training_Labs_V2/LAB_03/promote.xml

Design Summary

   Number of registers:          18 out of 13941 (<1%)
      Number of SLICE         registers:   18 out of 13824 (<1%)
      Number of PIO Input     registers:    0 out of    39 (0%)
      Number of PIO Output    registers:    0 out of    39 (0%)
      Number of PIO Tri-State registers:    0 out of    39 (0%)
   Number of LUT4s:              13 out of 13824 (<1%)
      Number used as logic LUT4s:                          3
      Number used as distributed RAM:                      0 (6 per 16X4 RAM)
      Number used as ripple logic:                        10 (2 per CCU2)
   Number of PIOs used/reserved:   17 out of    39 (44%)
      Number of PIOs reserved:      7 (per sysConfig and/or prohibit constraint)
      Number of PIOs used:         10
        Number of PIOs used for single ended IO:        10
        Number of PIO pairs used for differential IO:    0
        Number allocated to regular speed PIOs:    10 out of   17 (59%)
        Number allocated to high speed PIOs:        0 out of   22 (0%)
   Number of Dedicated IO used for ADC/DPHY:    0 out of   10 (0%)
   Number of IDDR/ODDR/TDDR functions used:      0 out of   100 (0%)
   Number of IOs using at least one DDR function: 0 (0 differential)
   Number of Block RAMs:          0 out of 24 (0%)
   Number of Large RAMs:          0 out of 5 (0%)
   Number of Logical DSP Functions:
      Number of Pre-Adders (9+9):    0 out of 48 (0%)
      Number of Multipliers (18x18): 0 out of 24 (0%)
         Number of 9X9:        0 (1 18x18 = 2   9x9)
         Number of 18x18:      0 (1 18x18 = 1 18x18)
         Number of 18x36:      0 (2 18x18 = 1 18x36)
         Number of 36x36:      0 (4 18x18 = 1 36x36)
      Number of 54-bit Accumulators: 0 out of 12 (0%)
      Number of 18-bit Registers:    0 out of 48 (0%)
   Number of Physical DSP Components:
      Number of PREADD9:             0 out of 48 (0%)
      Number of MULT9:               0 out of 48 (0%)
      Number of MULT18:              0 out of 24 (0%)
      Number of MULT18X36:           0 out of 12 (0%)
      Number of MULT36:              0 out of 6 (0%)
      Number of ACC54:               0 out of 12 (0%)
      Number of REG18:               0 out of 48 (0%)
   Number of PLLs:                0 out of 2 (0%)
   Number of DDRDLLs:             0 out of 2 (0%)
   Number of DLLDELs:             0 out of 7 (0%)
   Number of DQSs:                0 out of 3 (0%)
   Number of DCSs:                0 out of 1 (0%)
   Number of DCCs:                1 out of 62 (2%)
   Number of PCLKDIVs:            0 out of 1 (0%)
   Number of ECLKDIVs:            0 out of 12 (0%)
   Number of ECLKSYNCs:           0 out of 12 (0%)
   Number of ADC Blocks:          0 out of 1 (0%)
   Number of SGMIICDRs:           0 out of 2 (0%)
   Number of PMUs:                0 out of 1 (0%)
   Number of BNKREF18s:           0 out of 3 (0%)
   Number of BNKREF33s:           0 out of 2 (0%)
   Number of I2CFIFOs:            0 out of 1 (0%)
   Number of DPHYs:               0 out of 2 (0%)
   Number of Oscillators:         0 out of 1 (0%)
   Number of GSR:                 0 out of 1 (0%)
   Number of Cryptographic Block: 0 out of 1 (0%)
   Number of Config IP:           0 out of 1 (0%)
                 TSALL:           0 out of 1 (0%)
   Number of JTAG:                0 out of 1 (0%)
   Number of Config LMMI:         0 out of 1 (0%)
   Number of Config MULTIBOOT:    0 out of 1 (0%)
   Number of SED:                 0 out of 1 (0%)
   Number of Config WDT:          0 out of 1 (0%)
   Number of Clocks:  2
      Net Clk_c: 3 loads, 3 rising, 0 falling (Driver: Port Clk)
      Net clk2: 13 loads, 5 rising, 8 falling (Driver: Pin MyDCC/CLKO)
   Number of Clock Enables:  1
      Pin En1: 2 loads, 2 SLICEs (Net: En1_c)
   Number of LSRs:  0
   Top 10 highest fanout non-clock nets:
      Net CNT1[0]: 3 loads
      Net CNT2[0]: 2 loads
      Net CNT2[2]: 2 loads
      Net CNT2[3]: 2 loads
      Net CNT2[4]: 2 loads
      Net CNT2_7__N_3[0]: 2 loads
      Net CNT2_7__N_3[3]: 2 loads
      Net CNT2_7__N_3[4]: 2 loads
      Net n134: 2 loads
      Net n135: 2 loads

   Number of warnings:  0
   Number of errors:    0

Design Errors/Warnings

   No errors or warnings present.

IO (PIO) Attributes

+---------------------+-----------+-----------+-------+-------+-----------+
| IO Name             | Direction | Levelmode |  IO   |  IO   | Special   |
|                     |           |  IO_TYPE  |  REG  |  DDR  | IO Buffer |
+---------------------+-----------+-----------+-------+-------+-----------+
| out2[5]             | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| out2[6]             | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| out2[7]             | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| out2[4]             | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| out2[3]             | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| out2[2]             | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| out2[1]             | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| out2[0]             | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| Clk                 | INPUT     |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| En1                 | INPUT     |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+

Removed logic

Block GSR_INST undriven or does not drive anything - clipped.
Block i2 was optimized away.
Block i12_1_lut was optimized away.
Block i1 was optimized away.

ASIC Components

Instance Name: MyDCC
         Type: DCC

Constraint Summary

   Total number of constraints: 2
   Total number of constraints dropped: 0

Run Time and Memory Usage

   Total CPU Time: 1 secs
   Total REAL Time: 2 secs
   Peak Memory Usage: 269 MB
Checksum -- map: cd4c7307c01ec4e168b376413a36b953ad953e94
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