Timing Report
Lattice Timing Report -  Setup  and Hold, Version Radiant Software (64-bit) 2023.2.1.288.0

Wed Jun  5 12:16:32 2024

Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995 AT&T Corp.   All rights reserved.
Copyright (c) 1995-2001 Lucent Technologies Inc.  All rights reserved.
Copyright (c) 2001 Agere Systems   All rights reserved.
Copyright (c) 2002-2023 Lattice Semiconductor Corporation,  All rights reserved.

Command line:    timing -sethld -v 100 -u 10 -endpoints 100 -nperend 1 -html -rpt lab03_impl_1.tws lab03_impl_1_syn.udb -gui -msgset C:/Users/ssyahril/Downloads/FAE_F2F_Training_Labs_V2/FAE_F2F_Training_Labs_V2/LAB_03/promote.xml

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Design:          top
Family:          LIFCL
Device:          LIFCL-17
Package:         QFN72
Performance:     9_High-Performance_1.0V
Package Status:                     Final          Version 23
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=====================================================================
                    Table of Contents
=====================================================================
  • 1 Timing Overview
  • 1.1 SDC Constraints
  • 1.2 Constraint Coverage
  • 1.3 Overall Summary
  • 1.4 Unconstrained Report
  • 1.5 Combinational Loop
  • 2 Setup at Speed Grade 9_High-Performance_1.0V Corner at 85 Degrees
  • 2.1 Clock Summary
  • 2.2 Endpoint slacks
  • 2.3 Detailed Report
  • 3 Hold at Speed Grade M Corner at 0 Degrees
  • 3.1 Endpoint slacks
  • 3.2 Detailed Report
  • ===================================================================== End of Table of Contents ===================================================================== 1 Timing Overview 1.1 SDC Constraints create_clock -name {CLK1} -period 10 [get_ports Clk] create_generated_clock -name {CLK2} -source [get_pins Clk_pad.bb_inst/O] -edges {1 2 9} [get_pins MyDCC/CLKO] 1.2 Constraint Coverage Constraint Coverage: 66.6667% 1.3 Overall Summary Setup at Speed Grade 9_High-Performance_1.0V Corner at 85 Degrees Timing Errors: 0 endpoints; Total Negative Slack: 0.000 ns Hold at Speed Grade M Corner at 0 Degrees Timing Errors: 0 endpoints; Total Negative Slack: 0.000 ns 1.4 Unconstrained Report 1.4.1 Unconstrained Start/End Points Clocked but unconstrained timing start points ------------------------------------------------------------------- Listing 8 Start Points | Type ------------------------------------------------------------------- CNT2_d_i8.ff_inst/Q | No required time CNT2_d_i7.ff_inst/Q | No required time CNT2_d_i6.ff_inst/Q | No required time CNT2_d_i5.ff_inst/Q | No required time CNT2_d_i4.ff_inst/Q | No required time CNT2_d_i3.ff_inst/Q | No required time CNT2_d_i2.ff_inst/Q | No required time CNT2_d_i1.ff_inst/Q | No required time ------------------------------------------------------------------- | Number of unconstrained timing start po | ints | 8 | ------------------------------------------------------------------- Clocked but unconstrained timing end points ------------------------------------------------------------------- Listing 2 End Points | Type ------------------------------------------------------------------- CNT1_e3_e3_e3_21__i1.ff_inst/CE | No arrival time CNT1_e3_e3_e3_21__i0.ff_inst/CE | No arrival time ------------------------------------------------------------------- | Number of unconstrained timing end poin | ts | 2 | ------------------------------------------------------------------- 1.4.2 Start/End Points Without Timing Constraints I/O ports without constraint ---------------------------- Possible constraints to use on I/O ports are: set_input_delay, set_output_delay, set_max_delay, create_clock, create_generated_clock, ... ------------------------------------------------------------------- Listing 9 Start or End Points | Type ------------------------------------------------------------------- En1 | input out2[7] | output out2[6] | output out2[5] | output out2[4] | output out2[3] | output out2[2] | output out2[1] | output out2[0] | output ------------------------------------------------------------------- | Number of I/O ports without constraint | 9 | ------------------------------------------------------------------- Nets without clock definition Define a clock on a top level port or a generated clock on a clock divider pin associated with this net(s). -------------------------------------------------- There is no instance satisfying reporting criteria 1.5 Combinational Loop None 2 Setup at Speed Grade 9_High-Performance_1.0V Corner at 85 Degrees 2.1 Clock Summary 2.1.1 Clock "CLK1" create_clock -name {CLK1} -period 10 [get_ports Clk] Single Clock Domain ------------------------------------------------------------------------------------------------------- Clock CLK1 | | Period | Frequency ------------------------------------------------------------------------------------------------------- From CLK1 | Target | 10.000 ns | 100.000 MHz | Actual (all paths) | 5.000 ns | 200.000 MHz Clk_pad.bb_inst/B (MPW) | (50% duty cycle) | 5.000 ns | 200.000 MHz ------------------------------------------------------------------------------------------------------- Clock Domain Crossing ------------------------------------------------------------------------------------------------------ Clock CLK1 | Worst Time Between Edges | Comment ------------------------------------------------------------------------------------------------------ From CLK2 | ---- | No path ------------------------------------------------------------------------------------------------------ 2.1.2 Clock "CLK2" create_generated_clock -name {CLK2} -source [get_pins Clk_pad.bb_inst/O] -edges {1 2 9} [get_pins MyDCC/CLKO] Single Clock Domain ------------------------------------------------------------------------------------------------------- Clock CLK2 | | Period | Frequency ------------------------------------------------------------------------------------------------------- From CLK2 | Target | 40.000 ns | 25.000 MHz | Actual (all paths) | 1.843 ns | 542.594 MHz CNT2_e3_e3_e3_20__i0.ff_inst/CLK (MPW) | (50% duty cycle) | 1.000 ns | 1000.000 MHz ------------------------------------------------------------------------------------------------------- Clock Domain Crossing ------------------------------------------------------------------------------------------------------ Clock CLK2 | Worst Time Between Edges | Comment ------------------------------------------------------------------------------------------------------ From CLK1 | ---- | No path ------------------------------------------------------------------------------------------------------ 2.2 Endpoint slacks ------------------------------------------------------- Listing 19 End Points | Slack ------------------------------------------------------- CNT2_d_i1.ff_inst/DF | 4.829 ns CNT2_d_i2.ff_inst/DF | 4.829 ns CNT2_d_i3.ff_inst/DF | 4.829 ns CNT2_d_i4.ff_inst/DF | 4.829 ns CNT2_d_i5.ff_inst/DF | 4.829 ns CNT2_d_i6.ff_inst/DF | 4.829 ns CNT2_d_i7.ff_inst/DF | 4.829 ns CNT2_d_i8.ff_inst/DF | 4.829 ns MyDCC/CE | 8.613 ns CNT1_e3_e3_e3_21__i0.ff_inst/DF | 8.648 ns CNT1_e3_e3_e3_21__i1.ff_inst/DF | 8.648 ns CNT2_e3_e3_e3_20__i6.ff_inst/DF | 38.157 ns CNT2_e3_e3_e3_20__i7.ff_inst/DF | 38.175 ns CNT2_e3_e3_e3_20__i4.ff_inst/DF | 38.211 ns CNT2_e3_e3_e3_20__i5.ff_inst/DF | 38.229 ns CNT2_e3_e3_e3_20__i2.ff_inst/DF | 38.265 ns CNT2_e3_e3_e3_20__i3.ff_inst/DF | 38.283 ns CNT2_e3_e3_e3_20__i1.ff_inst/DF | 38.337 ns CNT2_e3_e3_e3_20__i0.ff_inst/DF | 38.648 ns ------------------------------------------------------- | Setup # of endpoints with negative slack:| 0 | ------------------------------------------------------- 2.3 Detailed Report XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Detail report of critical paths XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Detailed Report for timing paths +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++++Path 1 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i0.ff_inst/Q (SLICEREG) Path End : CNT2_d_i1.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 58.9% (route), 41.1% (logic) Clock Skew : 0.533 ns Setup Constraint : 5.000 ns Path Slack : 4.829 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i0.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i1.ff_inst/DF", "phy_name":"CNT2_d_i1.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[0]", "phy_name":"CNT2[0]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.975, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i0.ff_inst/CLK->CNT2_e3_e3_e3_20__i0.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[0] NET DELAY 0.435 2.975 2 CNT2_d_i1.ff_inst/DF ENDPOINT 0.000 2.975 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i1.ff_inst/CLK", "phy_name":"CNT2_d_i1.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":5.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":5.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":6.259, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":6.694, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":6.694, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":7.129, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":7.334, "delay":0.205 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":7.769, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":7.769, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 5.000 1 Clk top CLOCK LATENCY 0.000 5.000 1 Clk NET DELAY 0.000 5.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 6.259 3 Clk_c NET DELAY 0.435 6.694 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 6.694 9 clk2 NET DELAY 0.435 7.129 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.205 7.334 8 clk2_derived_9 NET DELAY 0.435 7.769 8 CNT2_d_i1.ff_inst/CLK CLOCK PIN 0.000 7.769 1 Uncertainty -(0.000) 7.769 Setup time -(-0.035) 7.804 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 7.804 Arrival Time -(2.975) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 4.829 ++++ Path 2 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i1.ff_inst/Q (SLICEREG) Path End : CNT2_d_i2.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 58.9% (route), 41.1% (logic) Clock Skew : 0.533 ns Setup Constraint : 5.000 ns Path Slack : 4.829 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i1.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i2.ff_inst/DF", "phy_name":"CNT2_d_i2.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[1]", "phy_name":"CNT2[1]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.975, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i1.ff_inst/CLK->CNT2_e3_e3_e3_20__i1.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[1] NET DELAY 0.435 2.975 2 CNT2_d_i2.ff_inst/DF ENDPOINT 0.000 2.975 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i2.ff_inst/CLK", "phy_name":"CNT2_d_i2.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":5.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":5.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":6.259, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":6.694, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":6.694, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":7.129, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":7.334, "delay":0.205 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":7.769, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":7.769, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 5.000 1 Clk top CLOCK LATENCY 0.000 5.000 1 Clk NET DELAY 0.000 5.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 6.259 3 Clk_c NET DELAY 0.435 6.694 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 6.694 9 clk2 NET DELAY 0.435 7.129 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.205 7.334 8 clk2_derived_9 NET DELAY 0.435 7.769 8 CNT2_d_i2.ff_inst/CLK CLOCK PIN 0.000 7.769 1 Uncertainty -(0.000) 7.769 Setup time -(-0.035) 7.804 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 7.804 Arrival Time -(2.975) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 4.829 ++++ Path 3 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i2.ff_inst/Q (SLICEREG) Path End : CNT2_d_i3.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 58.9% (route), 41.1% (logic) Clock Skew : 0.533 ns Setup Constraint : 5.000 ns Path Slack : 4.829 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i2.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i3.ff_inst/DF", "phy_name":"CNT2_d_i3.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[2]", "phy_name":"CNT2[2]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.975, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i2.ff_inst/CLK->CNT2_e3_e3_e3_20__i2.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[2] NET DELAY 0.435 2.975 2 CNT2_d_i3.ff_inst/DF ENDPOINT 0.000 2.975 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i3.ff_inst/CLK", "phy_name":"CNT2_d_i3.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":5.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":5.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":6.259, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":6.694, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":6.694, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":7.129, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":7.334, "delay":0.205 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":7.769, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":7.769, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 5.000 1 Clk top CLOCK LATENCY 0.000 5.000 1 Clk NET DELAY 0.000 5.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 6.259 3 Clk_c NET DELAY 0.435 6.694 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 6.694 9 clk2 NET DELAY 0.435 7.129 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.205 7.334 8 clk2_derived_9 NET DELAY 0.435 7.769 8 CNT2_d_i3.ff_inst/CLK CLOCK PIN 0.000 7.769 1 Uncertainty -(0.000) 7.769 Setup time -(-0.035) 7.804 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 7.804 Arrival Time -(2.975) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 4.829 ++++ Path 4 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i3.ff_inst/Q (SLICEREG) Path End : CNT2_d_i4.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 58.9% (route), 41.1% (logic) Clock Skew : 0.533 ns Setup Constraint : 5.000 ns Path Slack : 4.829 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i3.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i4.ff_inst/DF", "phy_name":"CNT2_d_i4.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[3]", "phy_name":"CNT2[3]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.975, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i3.ff_inst/CLK->CNT2_e3_e3_e3_20__i3.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[3] NET DELAY 0.435 2.975 2 CNT2_d_i4.ff_inst/DF ENDPOINT 0.000 2.975 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i4.ff_inst/CLK", "phy_name":"CNT2_d_i4.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":5.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":5.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":6.259, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":6.694, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":6.694, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":7.129, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":7.334, "delay":0.205 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":7.769, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":7.769, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 5.000 1 Clk top CLOCK LATENCY 0.000 5.000 1 Clk NET DELAY 0.000 5.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 6.259 3 Clk_c NET DELAY 0.435 6.694 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 6.694 9 clk2 NET DELAY 0.435 7.129 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.205 7.334 8 clk2_derived_9 NET DELAY 0.435 7.769 8 CNT2_d_i4.ff_inst/CLK CLOCK PIN 0.000 7.769 1 Uncertainty -(0.000) 7.769 Setup time -(-0.035) 7.804 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 7.804 Arrival Time -(2.975) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 4.829 ++++ Path 5 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i4.ff_inst/Q (SLICEREG) Path End : CNT2_d_i5.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 58.9% (route), 41.1% (logic) Clock Skew : 0.533 ns Setup Constraint : 5.000 ns Path Slack : 4.829 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i4.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i5.ff_inst/DF", "phy_name":"CNT2_d_i5.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[4]", "phy_name":"CNT2[4]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.975, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i4.ff_inst/CLK->CNT2_e3_e3_e3_20__i4.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[4] NET DELAY 0.435 2.975 2 CNT2_d_i5.ff_inst/DF ENDPOINT 0.000 2.975 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i5.ff_inst/CLK", "phy_name":"CNT2_d_i5.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":5.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":5.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":6.259, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":6.694, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":6.694, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":7.129, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":7.334, "delay":0.205 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":7.769, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":7.769, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 5.000 1 Clk top CLOCK LATENCY 0.000 5.000 1 Clk NET DELAY 0.000 5.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 6.259 3 Clk_c NET DELAY 0.435 6.694 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 6.694 9 clk2 NET DELAY 0.435 7.129 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.205 7.334 8 clk2_derived_9 NET DELAY 0.435 7.769 8 CNT2_d_i5.ff_inst/CLK CLOCK PIN 0.000 7.769 1 Uncertainty -(0.000) 7.769 Setup time -(-0.035) 7.804 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 7.804 Arrival Time -(2.975) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 4.829 ++++ Path 6 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i5.ff_inst/Q (SLICEREG) Path End : CNT2_d_i6.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 58.9% (route), 41.1% (logic) Clock Skew : 0.533 ns Setup Constraint : 5.000 ns Path Slack : 4.829 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i5.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i6.ff_inst/DF", "phy_name":"CNT2_d_i6.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[5]", "phy_name":"CNT2[5]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.975, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i5.ff_inst/CLK->CNT2_e3_e3_e3_20__i5.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[5] NET DELAY 0.435 2.975 2 CNT2_d_i6.ff_inst/DF ENDPOINT 0.000 2.975 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i6.ff_inst/CLK", "phy_name":"CNT2_d_i6.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":5.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":5.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":6.259, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":6.694, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":6.694, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":7.129, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":7.334, "delay":0.205 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":7.769, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":7.769, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 5.000 1 Clk top CLOCK LATENCY 0.000 5.000 1 Clk NET DELAY 0.000 5.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 6.259 3 Clk_c NET DELAY 0.435 6.694 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 6.694 9 clk2 NET DELAY 0.435 7.129 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.205 7.334 8 clk2_derived_9 NET DELAY 0.435 7.769 8 CNT2_d_i6.ff_inst/CLK CLOCK PIN 0.000 7.769 1 Uncertainty -(0.000) 7.769 Setup time -(-0.035) 7.804 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 7.804 Arrival Time -(2.975) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 4.829 ++++ Path 7 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i6.ff_inst/Q (SLICEREG) Path End : CNT2_d_i7.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 58.9% (route), 41.1% (logic) Clock Skew : 0.533 ns Setup Constraint : 5.000 ns Path Slack : 4.829 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i6.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i7.ff_inst/DF", "phy_name":"CNT2_d_i7.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[6]", "phy_name":"CNT2[6]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.975, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i6.ff_inst/CLK->CNT2_e3_e3_e3_20__i6.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[6] NET DELAY 0.435 2.975 2 CNT2_d_i7.ff_inst/DF ENDPOINT 0.000 2.975 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i7.ff_inst/CLK", "phy_name":"CNT2_d_i7.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":5.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":5.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":6.259, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":6.694, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":6.694, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":7.129, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":7.334, "delay":0.205 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":7.769, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":7.769, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 5.000 1 Clk top CLOCK LATENCY 0.000 5.000 1 Clk NET DELAY 0.000 5.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 6.259 3 Clk_c NET DELAY 0.435 6.694 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 6.694 9 clk2 NET DELAY 0.435 7.129 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.205 7.334 8 clk2_derived_9 NET DELAY 0.435 7.769 8 CNT2_d_i7.ff_inst/CLK CLOCK PIN 0.000 7.769 1 Uncertainty -(0.000) 7.769 Setup time -(-0.035) 7.804 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 7.804 Arrival Time -(2.975) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 4.829 ++++ Path 8 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i7.ff_inst/Q (SLICEREG) Path End : CNT2_d_i8.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 58.9% (route), 41.1% (logic) Clock Skew : 0.533 ns Setup Constraint : 5.000 ns Path Slack : 4.829 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i7.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i8.ff_inst/DF", "phy_name":"CNT2_d_i8.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[7]", "phy_name":"CNT2[7]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.975, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i7.ff_inst/CLK->CNT2_e3_e3_e3_20__i7.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[7] NET DELAY 0.435 2.975 2 CNT2_d_i8.ff_inst/DF ENDPOINT 0.000 2.975 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i8.ff_inst/CLK", "phy_name":"CNT2_d_i8.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":5.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":5.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":6.259, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":6.694, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":6.694, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":7.129, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":7.334, "delay":0.205 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":7.769, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":7.769, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 5.000 1 Clk top CLOCK LATENCY 0.000 5.000 1 Clk NET DELAY 0.000 5.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 6.259 3 Clk_c NET DELAY 0.435 6.694 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 6.694 9 clk2 NET DELAY 0.435 7.129 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.205 7.334 8 clk2_derived_9 NET DELAY 0.435 7.769 8 CNT2_d_i8.ff_inst/CLK CLOCK PIN 0.000 7.769 1 Uncertainty -(0.000) 7.769 Setup time -(-0.035) 7.804 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 7.804 Arrival Time -(2.975) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 4.829 ++++ Path 9 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT1_e3_e3_e3_21__i0.ff_inst/Q (SLICEREG) Path End : MyDCC/CE (DCC) Source Clock : CLK1 (R) Destination Clock: CLK1 (R) Logic Level : 2 Delay Ratio : 62.7% (route), 37.3% (logic) Clock Skew : 0.000 ns Setup Constraint : 10.000 ns Path Slack : 8.613 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":1.801, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- -------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 CNT1_e3_e3_e3_21__i0.ff_inst/CLK CLOCK PIN 0.000 1.801 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"MyDCC/CE", "phy_name":"MyDCC/CE" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q" }, "arrive":2.105, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT1[0]", "phy_name":"CNT1[0]" }, "arrive":2.540, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i25_2_lut/A", "phy_name":"i25_2_lut/A" }, "pin1": { "log_name":"i25_2_lut/Z", "phy_name":"i25_2_lut/Z" }, "arrive":2.753, "delay":0.213 }, { "type":"net_delay", "net": { "log_name":"Enable", "phy_name":"Enable" }, "arrive":3.188, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.188, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- -------- --------------------- ------ CNT1_e3_e3_e3_21__i0.ff_inst/CLK->CNT1_e3_e3_e3_21__i0.ff_inst/Q SLICEREG REG_DEL 0.304 2.105 3 CNT1[0] NET DELAY 0.435 2.540 3 i25_2_lut/A->i25_2_lut/Z LUT4 CTOF_DEL 0.213 2.753 1 Enable NET DELAY 0.435 3.188 1 MyDCC/CE ENDPOINT 0.000 3.188 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":10.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":10.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":11.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":11.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":11.801, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- -------- --------------------- ------ CONSTRAINT 0.000 10.000 1 Clk top CLOCK LATENCY 0.000 10.000 1 Clk NET DELAY 0.000 10.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 11.366 3 Clk_c NET DELAY 0.435 11.801 3 MyDCC/CLKI CLOCK PIN 0.000 11.801 1 Uncertainty -(0.000) 11.801 Setup time -(0.000) 11.801 ---------------------------------------- -------------- ------------- -------- --------------------- ------ Required Time 11.801 Arrival Time -(3.188) ---------------------------------------- -------------- ------------- -------- --------------------- ------ Path Slack (Passed) 8.613 ++++ Path 10 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT1_e3_e3_e3_21__i0.ff_inst/Q (SLICEREG) Path End : CNT1_e3_e3_e3_21__i0.ff_inst/DF (SLICEREG) Source Clock : CLK1 (R) Destination Clock: CLK1 (R) Logic Level : 2 Delay Ratio : 62.7% (route), 37.3% (logic) Clock Skew : 0.000 ns Setup Constraint : 10.000 ns Path Slack : 8.648 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":1.801, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 CNT1_e3_e3_e3_21__i0.ff_inst/CLK CLOCK PIN 0.000 1.801 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/DF", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q" }, "arrive":2.105, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT1[0]", "phy_name":"CNT1[0]" }, "arrive":2.540, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i34_1_lut/A", "phy_name":"i34_1_lut/A" }, "pin1": { "log_name":"i34_1_lut/Z", "phy_name":"i34_1_lut/Z" }, "arrive":2.753, "delay":0.213 }, { "type":"net_delay", "net": { "log_name":"n15", "phy_name":"n15" }, "arrive":3.188, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.188, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT1_e3_e3_e3_21__i0.ff_inst/CLK->CNT1_e3_e3_e3_21__i0.ff_inst/Q SLICEREG REG_DEL 0.304 2.105 3 CNT1[0] NET DELAY 0.435 2.540 3 i34_1_lut/A->i34_1_lut/Z LUT4 CTOF_DEL 0.213 2.753 1 n15 NET DELAY 0.435 3.188 1 CNT1_e3_e3_e3_21__i0.ff_inst/DF ENDPOINT 0.000 3.188 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":10.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":10.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":11.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":11.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":11.801, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 10.000 1 Clk top CLOCK LATENCY 0.000 10.000 1 Clk NET DELAY 0.000 10.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 11.366 3 Clk_c NET DELAY 0.435 11.801 3 CNT1_e3_e3_e3_21__i0.ff_inst/CLK CLOCK PIN 0.000 11.801 1 Uncertainty -(0.000) 11.801 Setup time -(-0.035) 11.836 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 11.836 Arrival Time -(3.188) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 8.648 ++++ Path 11 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT1_e3_e3_e3_21__i0.ff_inst/Q (SLICEREG) Path End : CNT1_e3_e3_e3_21__i1.ff_inst/DF (SLICEREG) Source Clock : CLK1 (R) Destination Clock: CLK1 (R) Logic Level : 2 Delay Ratio : 62.7% (route), 37.3% (logic) Clock Skew : 0.000 ns Setup Constraint : 10.000 ns Path Slack : 8.648 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":1.801, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 CNT1_e3_e3_e3_21__i0.ff_inst/CLK CLOCK PIN 0.000 1.801 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i1.ff_inst/DF", "phy_name":"CNT1_e3_e3_e3_21__i1.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q" }, "arrive":2.105, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT1[0]", "phy_name":"CNT1[0]" }, "arrive":2.540, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i36_2_lut/B", "phy_name":"i36_2_lut/B" }, "pin1": { "log_name":"i36_2_lut/Z", "phy_name":"i36_2_lut/Z" }, "arrive":2.753, "delay":0.213 }, { "type":"net_delay", "net": { "log_name":"n14", "phy_name":"n14" }, "arrive":3.188, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.188, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT1_e3_e3_e3_21__i0.ff_inst/CLK->CNT1_e3_e3_e3_21__i0.ff_inst/Q SLICEREG REG_DEL 0.304 2.105 3 CNT1[0] NET DELAY 0.435 2.540 3 i36_2_lut/B->i36_2_lut/Z LUT4 CTOF_DEL 0.213 2.753 1 n14 NET DELAY 0.435 3.188 1 CNT1_e3_e3_e3_21__i1.ff_inst/DF ENDPOINT 0.000 3.188 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i1.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i1.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":10.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":10.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":11.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":11.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":11.801, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 10.000 1 Clk top CLOCK LATENCY 0.000 10.000 1 Clk NET DELAY 0.000 10.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 11.366 3 Clk_c NET DELAY 0.435 11.801 3 CNT1_e3_e3_e3_21__i1.ff_inst/CLK CLOCK PIN 0.000 11.801 1 Uncertainty -(0.000) 11.801 Setup time -(-0.035) 11.836 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 11.836 Arrival Time -(3.188) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 8.648 ++++ Path 12 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i0.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i6.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 5 Delay Ratio : 46.3% (route), 53.7% (logic) Clock Skew : 0.000 ns Setup Constraint : 40.000 ns Path Slack : 38.157 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i0.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[0]", "phy_name":"CNT2[0]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/B1", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/B1" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/COUT" }, "arrive":3.291, "delay":0.316 }, { "type":"net_delay", "net": { "log_name":"n134", "phy_name":"n134" }, "arrive":3.291, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/COUT" }, "arrive":3.345, "delay":0.054 }, { "type":"net_delay", "net": { "log_name":"n135", "phy_name":"n135" }, "arrive":3.345, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_5/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_5/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_5/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_5/COUT" }, "arrive":3.399, "delay":0.054 }, { "type":"net_delay", "net": { "log_name":"n136", "phy_name":"n136" }, "arrive":3.399, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_7/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_7/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_7/S1", "phy_name":"CNT2_e3_e3_e3_20_add_4_7/S1" }, "arrive":3.679, "delay":0.280 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[6]", "phy_name":"CNT2_7__N_3[6]" }, "arrive":4.114, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":4.114, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i0.ff_inst/CLK->CNT2_e3_e3_e3_20__i0.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[0] NET DELAY 0.435 2.975 2 CNT2_e3_e3_e3_20_add_4_cin/B1->CNT2_e3_e3_e3_20_add_4_cin/COUT CCU2 C1TOFCO_DEL 0.316 3.291 1 n134 NET DELAY 0.000 3.291 1 CNT2_e3_e3_e3_20_add_4_3/CIN->CNT2_e3_e3_e3_20_add_4_3/COUT CCU2 FCITOFCO_DEL 0.054 3.345 1 n135 NET DELAY 0.000 3.345 1 CNT2_e3_e3_e3_20_add_4_5/CIN->CNT2_e3_e3_e3_20_add_4_5/COUT CCU2 FCITOFCO_DEL 0.054 3.399 1 n136 NET DELAY 0.000 3.399 1 CNT2_e3_e3_e3_20_add_4_7/CIN->CNT2_e3_e3_e3_20_add_4_7/S1 CCU2 FCITOF1_DEL 0.280 3.679 1 CNT2_7__N_3[6] NET DELAY 0.435 4.114 1 CNT2_e3_e3_e3_20__i6.ff_inst/DF ENDPOINT 0.000 4.114 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":40.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":40.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":41.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":41.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":41.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":42.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":42.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 40.000 1 Clk top CLOCK LATENCY 0.000 40.000 1 Clk NET DELAY 0.000 40.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 41.366 3 Clk_c NET DELAY 0.435 41.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 41.801 9 clk2 NET DELAY 0.435 42.236 9 CNT2_e3_e3_e3_20__i6.ff_inst/CLK CLOCK PIN 0.000 42.236 1 Uncertainty -(0.000) 42.236 Setup time -(-0.035) 42.271 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 42.271 Arrival Time -(4.114) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 38.157 ++++ Path 13 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i0.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i7.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 6 Delay Ratio : 46.8% (route), 53.2% (logic) Clock Skew : 0.000 ns Setup Constraint : 40.000 ns Path Slack : 38.175 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i0.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[0]", "phy_name":"CNT2[0]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/B1", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/B1" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/COUT" }, "arrive":3.291, "delay":0.316 }, { "type":"net_delay", "net": { "log_name":"n134", "phy_name":"n134" }, "arrive":3.291, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/COUT" }, "arrive":3.345, "delay":0.054 }, { "type":"net_delay", "net": { "log_name":"n135", "phy_name":"n135" }, "arrive":3.345, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_5/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_5/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_5/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_5/COUT" }, "arrive":3.399, "delay":0.054 }, { "type":"net_delay", "net": { "log_name":"n136", "phy_name":"n136" }, "arrive":3.399, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_7/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_7/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_7/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_7/COUT" }, "arrive":3.453, "delay":0.054 }, { "type":"net_delay", "net": { "log_name":"n137", "phy_name":"n137" }, "arrive":3.453, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_9/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_9/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_9/S0", "phy_name":"CNT2_e3_e3_e3_20_add_4_9/S0" }, "arrive":3.661, "delay":0.208 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[7]", "phy_name":"CNT2_7__N_3[7]" }, "arrive":4.096, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":4.096, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i0.ff_inst/CLK->CNT2_e3_e3_e3_20__i0.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[0] NET DELAY 0.435 2.975 2 CNT2_e3_e3_e3_20_add_4_cin/B1->CNT2_e3_e3_e3_20_add_4_cin/COUT CCU2 C1TOFCO_DEL 0.316 3.291 1 n134 NET DELAY 0.000 3.291 1 CNT2_e3_e3_e3_20_add_4_3/CIN->CNT2_e3_e3_e3_20_add_4_3/COUT CCU2 FCITOFCO_DEL 0.054 3.345 1 n135 NET DELAY 0.000 3.345 1 CNT2_e3_e3_e3_20_add_4_5/CIN->CNT2_e3_e3_e3_20_add_4_5/COUT CCU2 FCITOFCO_DEL 0.054 3.399 1 n136 NET DELAY 0.000 3.399 1 CNT2_e3_e3_e3_20_add_4_7/CIN->CNT2_e3_e3_e3_20_add_4_7/COUT CCU2 FCITOFCO_DEL 0.054 3.453 1 n137 NET DELAY 0.000 3.453 1 CNT2_e3_e3_e3_20_add_4_9/CIN->CNT2_e3_e3_e3_20_add_4_9/S0 CCU2 FCITOF0_DEL 0.208 3.661 1 CNT2_7__N_3[7] NET DELAY 0.435 4.096 1 CNT2_e3_e3_e3_20__i7.ff_inst/DF ENDPOINT 0.000 4.096 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":40.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":40.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":41.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":41.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":41.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":42.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":42.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 40.000 1 Clk top CLOCK LATENCY 0.000 40.000 1 Clk NET DELAY 0.000 40.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 41.366 3 Clk_c NET DELAY 0.435 41.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 41.801 9 clk2 NET DELAY 0.435 42.236 9 CNT2_e3_e3_e3_20__i7.ff_inst/CLK CLOCK PIN 0.000 42.236 1 Uncertainty -(0.000) 42.236 Setup time -(-0.035) 42.271 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 42.271 Arrival Time -(4.096) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 38.175 ++++ Path 14 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i0.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i4.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 4 Delay Ratio : 47.7% (route), 52.3% (logic) Clock Skew : 0.000 ns Setup Constraint : 40.000 ns Path Slack : 38.211 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i0.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[0]", "phy_name":"CNT2[0]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/B1", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/B1" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/COUT" }, "arrive":3.291, "delay":0.316 }, { "type":"net_delay", "net": { "log_name":"n134", "phy_name":"n134" }, "arrive":3.291, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/COUT" }, "arrive":3.345, "delay":0.054 }, { "type":"net_delay", "net": { "log_name":"n135", "phy_name":"n135" }, "arrive":3.345, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_5/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_5/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_5/S1", "phy_name":"CNT2_e3_e3_e3_20_add_4_5/S1" }, "arrive":3.625, "delay":0.280 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[4]", "phy_name":"CNT2_7__N_3[4]" }, "arrive":4.060, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":4.060, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i0.ff_inst/CLK->CNT2_e3_e3_e3_20__i0.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[0] NET DELAY 0.435 2.975 2 CNT2_e3_e3_e3_20_add_4_cin/B1->CNT2_e3_e3_e3_20_add_4_cin/COUT CCU2 C1TOFCO_DEL 0.316 3.291 1 n134 NET DELAY 0.000 3.291 1 CNT2_e3_e3_e3_20_add_4_3/CIN->CNT2_e3_e3_e3_20_add_4_3/COUT CCU2 FCITOFCO_DEL 0.054 3.345 1 n135 NET DELAY 0.000 3.345 1 CNT2_e3_e3_e3_20_add_4_5/CIN->CNT2_e3_e3_e3_20_add_4_5/S1 CCU2 FCITOF1_DEL 0.280 3.625 1 CNT2_7__N_3[4] NET DELAY 0.435 4.060 1 CNT2_e3_e3_e3_20__i4.ff_inst/DF ENDPOINT 0.000 4.060 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":40.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":40.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":41.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":41.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":41.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":42.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":42.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 40.000 1 Clk top CLOCK LATENCY 0.000 40.000 1 Clk NET DELAY 0.000 40.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 41.366 3 Clk_c NET DELAY 0.435 41.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 41.801 9 clk2 NET DELAY 0.435 42.236 9 CNT2_e3_e3_e3_20__i4.ff_inst/CLK CLOCK PIN 0.000 42.236 1 Uncertainty -(0.000) 42.236 Setup time -(-0.035) 42.271 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 42.271 Arrival Time -(4.060) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 38.211 ++++ Path 15 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i0.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i5.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 5 Delay Ratio : 48.2% (route), 51.8% (logic) Clock Skew : 0.000 ns Setup Constraint : 40.000 ns Path Slack : 38.229 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i0.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[0]", "phy_name":"CNT2[0]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/B1", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/B1" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/COUT" }, "arrive":3.291, "delay":0.316 }, { "type":"net_delay", "net": { "log_name":"n134", "phy_name":"n134" }, "arrive":3.291, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/COUT" }, "arrive":3.345, "delay":0.054 }, { "type":"net_delay", "net": { "log_name":"n135", "phy_name":"n135" }, "arrive":3.345, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_5/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_5/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_5/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_5/COUT" }, "arrive":3.399, "delay":0.054 }, { "type":"net_delay", "net": { "log_name":"n136", "phy_name":"n136" }, "arrive":3.399, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_7/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_7/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_7/S0", "phy_name":"CNT2_e3_e3_e3_20_add_4_7/S0" }, "arrive":3.607, "delay":0.208 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[5]", "phy_name":"CNT2_7__N_3[5]" }, "arrive":4.042, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":4.042, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i0.ff_inst/CLK->CNT2_e3_e3_e3_20__i0.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[0] NET DELAY 0.435 2.975 2 CNT2_e3_e3_e3_20_add_4_cin/B1->CNT2_e3_e3_e3_20_add_4_cin/COUT CCU2 C1TOFCO_DEL 0.316 3.291 1 n134 NET DELAY 0.000 3.291 1 CNT2_e3_e3_e3_20_add_4_3/CIN->CNT2_e3_e3_e3_20_add_4_3/COUT CCU2 FCITOFCO_DEL 0.054 3.345 1 n135 NET DELAY 0.000 3.345 1 CNT2_e3_e3_e3_20_add_4_5/CIN->CNT2_e3_e3_e3_20_add_4_5/COUT CCU2 FCITOFCO_DEL 0.054 3.399 1 n136 NET DELAY 0.000 3.399 1 CNT2_e3_e3_e3_20_add_4_7/CIN->CNT2_e3_e3_e3_20_add_4_7/S0 CCU2 FCITOF0_DEL 0.208 3.607 1 CNT2_7__N_3[5] NET DELAY 0.435 4.042 1 CNT2_e3_e3_e3_20__i5.ff_inst/DF ENDPOINT 0.000 4.042 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":40.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":40.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":41.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":41.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":41.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":42.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":42.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 40.000 1 Clk top CLOCK LATENCY 0.000 40.000 1 Clk NET DELAY 0.000 40.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 41.366 3 Clk_c NET DELAY 0.435 41.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 41.801 9 clk2 NET DELAY 0.435 42.236 9 CNT2_e3_e3_e3_20__i5.ff_inst/CLK CLOCK PIN 0.000 42.236 1 Uncertainty -(0.000) 42.236 Setup time -(-0.035) 42.271 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 42.271 Arrival Time -(4.042) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 38.229 ++++ Path 16 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i0.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i2.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 3 Delay Ratio : 49.2% (route), 50.8% (logic) Clock Skew : 0.000 ns Setup Constraint : 40.000 ns Path Slack : 38.265 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i0.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[0]", "phy_name":"CNT2[0]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/B1", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/B1" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/COUT" }, "arrive":3.291, "delay":0.316 }, { "type":"net_delay", "net": { "log_name":"n134", "phy_name":"n134" }, "arrive":3.291, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/S1", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/S1" }, "arrive":3.571, "delay":0.280 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[2]", "phy_name":"CNT2_7__N_3[2]" }, "arrive":4.006, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":4.006, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i0.ff_inst/CLK->CNT2_e3_e3_e3_20__i0.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[0] NET DELAY 0.435 2.975 2 CNT2_e3_e3_e3_20_add_4_cin/B1->CNT2_e3_e3_e3_20_add_4_cin/COUT CCU2 C1TOFCO_DEL 0.316 3.291 1 n134 NET DELAY 0.000 3.291 1 CNT2_e3_e3_e3_20_add_4_3/CIN->CNT2_e3_e3_e3_20_add_4_3/S1 CCU2 FCITOF1_DEL 0.280 3.571 1 CNT2_7__N_3[2] NET DELAY 0.435 4.006 1 CNT2_e3_e3_e3_20__i2.ff_inst/DF ENDPOINT 0.000 4.006 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":40.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":40.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":41.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":41.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":41.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":42.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":42.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 40.000 1 Clk top CLOCK LATENCY 0.000 40.000 1 Clk NET DELAY 0.000 40.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 41.366 3 Clk_c NET DELAY 0.435 41.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 41.801 9 clk2 NET DELAY 0.435 42.236 9 CNT2_e3_e3_e3_20__i2.ff_inst/CLK CLOCK PIN 0.000 42.236 1 Uncertainty -(0.000) 42.236 Setup time -(-0.035) 42.271 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 42.271 Arrival Time -(4.006) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 38.265 ++++ Path 17 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i0.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i3.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 4 Delay Ratio : 49.7% (route), 50.3% (logic) Clock Skew : 0.000 ns Setup Constraint : 40.000 ns Path Slack : 38.283 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i0.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[0]", "phy_name":"CNT2[0]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/B1", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/B1" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/COUT" }, "arrive":3.291, "delay":0.316 }, { "type":"net_delay", "net": { "log_name":"n134", "phy_name":"n134" }, "arrive":3.291, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/COUT" }, "arrive":3.345, "delay":0.054 }, { "type":"net_delay", "net": { "log_name":"n135", "phy_name":"n135" }, "arrive":3.345, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_5/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_5/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_5/S0", "phy_name":"CNT2_e3_e3_e3_20_add_4_5/S0" }, "arrive":3.553, "delay":0.208 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[3]", "phy_name":"CNT2_7__N_3[3]" }, "arrive":3.988, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.988, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i0.ff_inst/CLK->CNT2_e3_e3_e3_20__i0.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[0] NET DELAY 0.435 2.975 2 CNT2_e3_e3_e3_20_add_4_cin/B1->CNT2_e3_e3_e3_20_add_4_cin/COUT CCU2 C1TOFCO_DEL 0.316 3.291 1 n134 NET DELAY 0.000 3.291 1 CNT2_e3_e3_e3_20_add_4_3/CIN->CNT2_e3_e3_e3_20_add_4_3/COUT CCU2 FCITOFCO_DEL 0.054 3.345 1 n135 NET DELAY 0.000 3.345 1 CNT2_e3_e3_e3_20_add_4_5/CIN->CNT2_e3_e3_e3_20_add_4_5/S0 CCU2 FCITOF0_DEL 0.208 3.553 1 CNT2_7__N_3[3] NET DELAY 0.435 3.988 1 CNT2_e3_e3_e3_20__i3.ff_inst/DF ENDPOINT 0.000 3.988 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":40.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":40.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":41.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":41.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":41.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":42.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":42.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 40.000 1 Clk top CLOCK LATENCY 0.000 40.000 1 Clk NET DELAY 0.000 40.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 41.366 3 Clk_c NET DELAY 0.435 41.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 41.801 9 clk2 NET DELAY 0.435 42.236 9 CNT2_e3_e3_e3_20__i3.ff_inst/CLK CLOCK PIN 0.000 42.236 1 Uncertainty -(0.000) 42.236 Setup time -(-0.035) 42.271 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 42.271 Arrival Time -(3.988) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 38.283 ++++ Path 18 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i0.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i1.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 3 Delay Ratio : 51.2% (route), 48.8% (logic) Clock Skew : 0.000 ns Setup Constraint : 40.000 ns Path Slack : 38.337 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i0.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[0]", "phy_name":"CNT2[0]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/B1", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/B1" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/COUT", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/COUT" }, "arrive":3.291, "delay":0.316 }, { "type":"net_delay", "net": { "log_name":"n134", "phy_name":"n134" }, "arrive":3.291, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/CIN", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/CIN" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/S0", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/S0" }, "arrive":3.499, "delay":0.208 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[1]", "phy_name":"CNT2_7__N_3[1]" }, "arrive":3.934, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.934, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i0.ff_inst/CLK->CNT2_e3_e3_e3_20__i0.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[0] NET DELAY 0.435 2.975 2 CNT2_e3_e3_e3_20_add_4_cin/B1->CNT2_e3_e3_e3_20_add_4_cin/COUT CCU2 C1TOFCO_DEL 0.316 3.291 1 n134 NET DELAY 0.000 3.291 1 CNT2_e3_e3_e3_20_add_4_3/CIN->CNT2_e3_e3_e3_20_add_4_3/S0 CCU2 FCITOF0_DEL 0.208 3.499 1 CNT2_7__N_3[1] NET DELAY 0.435 3.934 1 CNT2_e3_e3_e3_20__i1.ff_inst/DF ENDPOINT 0.000 3.934 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":40.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":40.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":41.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":41.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":41.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":42.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":42.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 40.000 1 Clk top CLOCK LATENCY 0.000 40.000 1 Clk NET DELAY 0.000 40.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 41.366 3 Clk_c NET DELAY 0.435 41.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 41.801 9 clk2 NET DELAY 0.435 42.236 9 CNT2_e3_e3_e3_20__i1.ff_inst/CLK CLOCK PIN 0.000 42.236 1 Uncertainty -(0.000) 42.236 Setup time -(-0.035) 42.271 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 42.271 Arrival Time -(3.934) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 38.337 ++++ Path 19 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i0.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i0.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 2 Delay Ratio : 62.7% (route), 37.3% (logic) Clock Skew : 0.000 ns Setup Constraint : 40.000 ns Path Slack : 38.648 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i0.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "arrive":2.540, "delay":0.304 }, { "type":"net_delay", "net": { "log_name":"CNT2[0]", "phy_name":"CNT2[0]" }, "arrive":2.975, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/B1", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/B1" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/S1", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/S1" }, "arrive":3.188, "delay":0.213 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[0]", "phy_name":"CNT2_7__N_3[0]" }, "arrive":3.623, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.623, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CNT2_e3_e3_e3_20__i0.ff_inst/CLK->CNT2_e3_e3_e3_20__i0.ff_inst/Q SLICEREG REG_DEL 0.304 2.540 2 CNT2[0] NET DELAY 0.435 2.975 2 CNT2_e3_e3_e3_20_add_4_cin/B1->CNT2_e3_e3_e3_20_add_4_cin/S1 CCU2 CTOF_DEL 0.213 3.188 1 CNT2_7__N_3[0] NET DELAY 0.435 3.623 1 CNT2_e3_e3_e3_20__i0.ff_inst/DF ENDPOINT 0.000 3.623 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":40.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":40.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":41.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":41.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":41.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":42.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":42.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- --------- --------------------- ------ CONSTRAINT 0.000 40.000 1 Clk top CLOCK LATENCY 0.000 40.000 1 Clk NET DELAY 0.000 40.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 41.366 3 Clk_c NET DELAY 0.435 41.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 41.801 9 clk2 NET DELAY 0.435 42.236 9 CNT2_e3_e3_e3_20__i0.ff_inst/CLK CLOCK PIN 0.000 42.236 1 Uncertainty -(0.000) 42.236 Setup time -(-0.035) 42.271 ---------------------------------------- -------------- ------------- --------- --------------------- ------ Required Time 42.271 Arrival Time -(3.623) ---------------------------------------- -------------- ------------- --------- --------------------- ------ Path Slack (Passed) 38.648 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ End of Detailed Report for timing paths +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ########################################################## 3 Hold at Speed Grade M Corner at 0 Degrees 3.1 Endpoint slacks ------------------------------------------------------- Listing 19 End Points | Slack ------------------------------------------------------- CNT1_e3_e3_e3_21__i0.ff_inst/DF | 1.176 ns CNT1_e3_e3_e3_21__i1.ff_inst/DF | 1.176 ns CNT2_e3_e3_e3_20__i1.ff_inst/DF | 1.176 ns CNT2_e3_e3_e3_20__i2.ff_inst/DF | 1.176 ns CNT2_e3_e3_e3_20__i3.ff_inst/DF | 1.176 ns CNT2_e3_e3_e3_20__i4.ff_inst/DF | 1.176 ns CNT2_e3_e3_e3_20__i5.ff_inst/DF | 1.176 ns CNT2_e3_e3_e3_20__i6.ff_inst/DF | 1.176 ns CNT2_e3_e3_e3_20__i7.ff_inst/DF | 1.176 ns CNT2_e3_e3_e3_20__i0.ff_inst/DF | 1.176 ns MyDCC/CE | 1.320 ns CNT2_d_i1.ff_inst/DF | 35.053 ns CNT2_d_i2.ff_inst/DF | 35.053 ns CNT2_d_i3.ff_inst/DF | 35.053 ns CNT2_d_i4.ff_inst/DF | 35.053 ns CNT2_d_i5.ff_inst/DF | 35.053 ns CNT2_d_i6.ff_inst/DF | 35.053 ns CNT2_d_i7.ff_inst/DF | 35.053 ns CNT2_d_i8.ff_inst/DF | 35.053 ns ------------------------------------------------------- | Hold # of endpoints with negative slack: | 0 | ------------------------------------------------------- 3.2 Detailed Report XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Detail report of critical paths XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Detailed Report for timing paths +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++++Path 1 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT1_e3_e3_e3_21__i0.ff_inst/Q (SLICEREG) Path End : CNT1_e3_e3_e3_21__i0.ff_inst/DF (SLICEREG) Source Clock : CLK1 (R) Destination Clock: CLK1 (R) Logic Level : 2 Delay Ratio : 65.9% (route), 34.1% (logic) Clock Skew : 0.000 ns Hold Constraint : 0.000 ns Path Slack : 1.176 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":1.801, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 CNT1_e3_e3_e3_21__i0.ff_inst/CLK CLOCK PIN 0.000 1.801 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/DF", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q" }, "arrive":2.072, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT1[0]", "phy_name":"CNT1[0]" }, "arrive":2.507, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i34_1_lut/A", "phy_name":"i34_1_lut/A" }, "pin1": { "log_name":"i34_1_lut/Z", "phy_name":"i34_1_lut/Z" }, "arrive":2.686, "delay":0.179 }, { "type":"net_delay", "net": { "log_name":"n15", "phy_name":"n15" }, "arrive":3.121, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.121, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT1_e3_e3_e3_21__i0.ff_inst/CLK->CNT1_e3_e3_e3_21__i0.ff_inst/Q SLICEREG REG_DEL 0.271 2.072 3 CNT1[0] NET DELAY 0.435 2.507 3 i34_1_lut/A->i34_1_lut/Z LUT4 CTOF_DEL 0.179 2.686 1 n15 NET DELAY 0.435 3.121 1 CNT1_e3_e3_e3_21__i0.ff_inst/DF ENDPOINT 0.000 3.121 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":0.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":1.801, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 0.000 1 Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 CNT1_e3_e3_e3_21__i0.ff_inst/CLK CLOCK PIN 0.000 1.801 1 Uncertainty 0.000 1.801 Hold time 0.144 1.945 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time -1.945 Arrival Time 3.121 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 1.176 ++++ Path 2 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT1_e3_e3_e3_21__i0.ff_inst/Q (SLICEREG) Path End : CNT1_e3_e3_e3_21__i1.ff_inst/DF (SLICEREG) Source Clock : CLK1 (R) Destination Clock: CLK1 (R) Logic Level : 2 Delay Ratio : 65.9% (route), 34.1% (logic) Clock Skew : 0.000 ns Hold Constraint : 0.000 ns Path Slack : 1.176 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":1.801, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 CNT1_e3_e3_e3_21__i0.ff_inst/CLK CLOCK PIN 0.000 1.801 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i1.ff_inst/DF", "phy_name":"CNT1_e3_e3_e3_21__i1.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q" }, "arrive":2.072, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT1[0]", "phy_name":"CNT1[0]" }, "arrive":2.507, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i36_2_lut/B", "phy_name":"i36_2_lut/B" }, "pin1": { "log_name":"i36_2_lut/Z", "phy_name":"i36_2_lut/Z" }, "arrive":2.686, "delay":0.179 }, { "type":"net_delay", "net": { "log_name":"n14", "phy_name":"n14" }, "arrive":3.121, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.121, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT1_e3_e3_e3_21__i0.ff_inst/CLK->CNT1_e3_e3_e3_21__i0.ff_inst/Q SLICEREG REG_DEL 0.271 2.072 3 CNT1[0] NET DELAY 0.435 2.507 3 i36_2_lut/B->i36_2_lut/Z LUT4 CTOF_DEL 0.179 2.686 1 n14 NET DELAY 0.435 3.121 1 CNT1_e3_e3_e3_21__i1.ff_inst/DF ENDPOINT 0.000 3.121 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i1.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i1.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":0.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":1.801, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 0.000 1 Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 CNT1_e3_e3_e3_21__i1.ff_inst/CLK CLOCK PIN 0.000 1.801 1 Uncertainty 0.000 1.801 Hold time 0.144 1.945 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time -1.945 Arrival Time 3.121 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 1.176 ++++ Path 3 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i1.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i1.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 2 Delay Ratio : 65.9% (route), 34.1% (logic) Clock Skew : 0.000 ns Hold Constraint : 0.000 ns Path Slack : 1.176 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i1.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[1]", "phy_name":"CNT2[1]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/B0", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/B0" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/S0", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/S0" }, "arrive":3.121, "delay":0.179 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[1]", "phy_name":"CNT2_7__N_3[1]" }, "arrive":3.556, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.556, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i1.ff_inst/CLK->CNT2_e3_e3_e3_20__i1.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[1] NET DELAY 0.435 2.942 2 CNT2_e3_e3_e3_20_add_4_3/B0->CNT2_e3_e3_e3_20_add_4_3/S0 CCU2 CTOF_DEL 0.179 3.121 1 CNT2_7__N_3[1] NET DELAY 0.435 3.556 1 CNT2_e3_e3_e3_20__i1.ff_inst/DF ENDPOINT 0.000 3.556 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":0.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 0.000 1 Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i1.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Uncertainty 0.000 2.236 Hold time 0.144 2.380 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time -2.380 Arrival Time 3.556 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 1.176 ++++ Path 4 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i2.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i2.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 2 Delay Ratio : 65.9% (route), 34.1% (logic) Clock Skew : 0.000 ns Hold Constraint : 0.000 ns Path Slack : 1.176 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i2.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[2]", "phy_name":"CNT2[2]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/B1", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/B1" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_3/S1", "phy_name":"CNT2_e3_e3_e3_20_add_4_3/S1" }, "arrive":3.121, "delay":0.179 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[2]", "phy_name":"CNT2_7__N_3[2]" }, "arrive":3.556, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.556, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i2.ff_inst/CLK->CNT2_e3_e3_e3_20__i2.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[2] NET DELAY 0.435 2.942 2 CNT2_e3_e3_e3_20_add_4_3/B1->CNT2_e3_e3_e3_20_add_4_3/S1 CCU2 CTOF_DEL 0.179 3.121 1 CNT2_7__N_3[2] NET DELAY 0.435 3.556 1 CNT2_e3_e3_e3_20__i2.ff_inst/DF ENDPOINT 0.000 3.556 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":0.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 0.000 1 Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i2.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Uncertainty 0.000 2.236 Hold time 0.144 2.380 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time -2.380 Arrival Time 3.556 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 1.176 ++++ Path 5 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i3.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i3.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 2 Delay Ratio : 65.9% (route), 34.1% (logic) Clock Skew : 0.000 ns Hold Constraint : 0.000 ns Path Slack : 1.176 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i3.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[3]", "phy_name":"CNT2[3]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_5/B0", "phy_name":"CNT2_e3_e3_e3_20_add_4_5/B0" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_5/S0", "phy_name":"CNT2_e3_e3_e3_20_add_4_5/S0" }, "arrive":3.121, "delay":0.179 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[3]", "phy_name":"CNT2_7__N_3[3]" }, "arrive":3.556, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.556, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i3.ff_inst/CLK->CNT2_e3_e3_e3_20__i3.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[3] NET DELAY 0.435 2.942 2 CNT2_e3_e3_e3_20_add_4_5/B0->CNT2_e3_e3_e3_20_add_4_5/S0 CCU2 CTOF_DEL 0.179 3.121 1 CNT2_7__N_3[3] NET DELAY 0.435 3.556 1 CNT2_e3_e3_e3_20__i3.ff_inst/DF ENDPOINT 0.000 3.556 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":0.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 0.000 1 Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i3.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Uncertainty 0.000 2.236 Hold time 0.144 2.380 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time -2.380 Arrival Time 3.556 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 1.176 ++++ Path 6 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i4.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i4.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 2 Delay Ratio : 65.9% (route), 34.1% (logic) Clock Skew : 0.000 ns Hold Constraint : 0.000 ns Path Slack : 1.176 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i4.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[4]", "phy_name":"CNT2[4]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_5/B1", "phy_name":"CNT2_e3_e3_e3_20_add_4_5/B1" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_5/S1", "phy_name":"CNT2_e3_e3_e3_20_add_4_5/S1" }, "arrive":3.121, "delay":0.179 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[4]", "phy_name":"CNT2_7__N_3[4]" }, "arrive":3.556, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.556, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i4.ff_inst/CLK->CNT2_e3_e3_e3_20__i4.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[4] NET DELAY 0.435 2.942 2 CNT2_e3_e3_e3_20_add_4_5/B1->CNT2_e3_e3_e3_20_add_4_5/S1 CCU2 CTOF_DEL 0.179 3.121 1 CNT2_7__N_3[4] NET DELAY 0.435 3.556 1 CNT2_e3_e3_e3_20__i4.ff_inst/DF ENDPOINT 0.000 3.556 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":0.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 0.000 1 Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i4.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Uncertainty 0.000 2.236 Hold time 0.144 2.380 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time -2.380 Arrival Time 3.556 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 1.176 ++++ Path 7 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i5.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i5.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 2 Delay Ratio : 65.9% (route), 34.1% (logic) Clock Skew : 0.000 ns Hold Constraint : 0.000 ns Path Slack : 1.176 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i5.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[5]", "phy_name":"CNT2[5]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_7/B0", "phy_name":"CNT2_e3_e3_e3_20_add_4_7/B0" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_7/S0", "phy_name":"CNT2_e3_e3_e3_20_add_4_7/S0" }, "arrive":3.121, "delay":0.179 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[5]", "phy_name":"CNT2_7__N_3[5]" }, "arrive":3.556, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.556, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i5.ff_inst/CLK->CNT2_e3_e3_e3_20__i5.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[5] NET DELAY 0.435 2.942 2 CNT2_e3_e3_e3_20_add_4_7/B0->CNT2_e3_e3_e3_20_add_4_7/S0 CCU2 CTOF_DEL 0.179 3.121 1 CNT2_7__N_3[5] NET DELAY 0.435 3.556 1 CNT2_e3_e3_e3_20__i5.ff_inst/DF ENDPOINT 0.000 3.556 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":0.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 0.000 1 Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i5.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Uncertainty 0.000 2.236 Hold time 0.144 2.380 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time -2.380 Arrival Time 3.556 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 1.176 ++++ Path 8 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i6.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i6.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 2 Delay Ratio : 65.9% (route), 34.1% (logic) Clock Skew : 0.000 ns Hold Constraint : 0.000 ns Path Slack : 1.176 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i6.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[6]", "phy_name":"CNT2[6]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_7/B1", "phy_name":"CNT2_e3_e3_e3_20_add_4_7/B1" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_7/S1", "phy_name":"CNT2_e3_e3_e3_20_add_4_7/S1" }, "arrive":3.121, "delay":0.179 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[6]", "phy_name":"CNT2_7__N_3[6]" }, "arrive":3.556, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.556, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i6.ff_inst/CLK->CNT2_e3_e3_e3_20__i6.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[6] NET DELAY 0.435 2.942 2 CNT2_e3_e3_e3_20_add_4_7/B1->CNT2_e3_e3_e3_20_add_4_7/S1 CCU2 CTOF_DEL 0.179 3.121 1 CNT2_7__N_3[6] NET DELAY 0.435 3.556 1 CNT2_e3_e3_e3_20__i6.ff_inst/DF ENDPOINT 0.000 3.556 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":0.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 0.000 1 Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i6.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Uncertainty 0.000 2.236 Hold time 0.144 2.380 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time -2.380 Arrival Time 3.556 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 1.176 ++++ Path 9 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i7.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i7.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 2 Delay Ratio : 65.9% (route), 34.1% (logic) Clock Skew : 0.000 ns Hold Constraint : 0.000 ns Path Slack : 1.176 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i7.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[7]", "phy_name":"CNT2[7]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_9/B0", "phy_name":"CNT2_e3_e3_e3_20_add_4_9/B0" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_9/S0", "phy_name":"CNT2_e3_e3_e3_20_add_4_9/S0" }, "arrive":3.121, "delay":0.179 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[7]", "phy_name":"CNT2_7__N_3[7]" }, "arrive":3.556, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.556, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i7.ff_inst/CLK->CNT2_e3_e3_e3_20__i7.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[7] NET DELAY 0.435 2.942 2 CNT2_e3_e3_e3_20_add_4_9/B0->CNT2_e3_e3_e3_20_add_4_9/S0 CCU2 CTOF_DEL 0.179 3.121 1 CNT2_7__N_3[7] NET DELAY 0.435 3.556 1 CNT2_e3_e3_e3_20__i7.ff_inst/DF ENDPOINT 0.000 3.556 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":0.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 0.000 1 Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i7.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Uncertainty 0.000 2.236 Hold time 0.144 2.380 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time -2.380 Arrival Time 3.556 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 1.176 ++++ Path 10 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i0.ff_inst/Q (SLICEREG) Path End : CNT2_e3_e3_e3_20__i0.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (R) Logic Level : 2 Delay Ratio : 65.9% (route), 34.1% (logic) Clock Skew : 0.000 ns Hold Constraint : 0.000 ns Path Slack : 1.176 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i0.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/DF", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[0]", "phy_name":"CNT2[0]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/B1", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/B1" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20_add_4_cin/S1", "phy_name":"CNT2_e3_e3_e3_20_add_4_cin/S1" }, "arrive":3.121, "delay":0.179 }, { "type":"net_delay", "net": { "log_name":"CNT2_7__N_3[0]", "phy_name":"CNT2_7__N_3[0]" }, "arrive":3.556, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.556, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i0.ff_inst/CLK->CNT2_e3_e3_e3_20__i0.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[0] NET DELAY 0.435 2.942 2 CNT2_e3_e3_e3_20_add_4_cin/B1->CNT2_e3_e3_e3_20_add_4_cin/S1 CCU2 CTOF_DEL 0.179 3.121 1 CNT2_7__N_3[0] NET DELAY 0.435 3.556 1 CNT2_e3_e3_e3_20__i0.ff_inst/DF ENDPOINT 0.000 3.556 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":0.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 0.000 1 Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i0.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Uncertainty 0.000 2.236 Hold time 0.144 2.380 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time -2.380 Arrival Time 3.556 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 1.176 ++++ Path 11 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT1_e3_e3_e3_21__i0.ff_inst/Q (SLICEREG) Path End : MyDCC/CE (DCC) Source Clock : CLK1 (R) Destination Clock: CLK1 (R) Logic Level : 2 Delay Ratio : 65.9% (route), 34.1% (logic) Clock Skew : 0.000 ns Hold Constraint : 0.000 ns Path Slack : 1.320 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":1.801, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 CNT1_e3_e3_e3_21__i0.ff_inst/CLK CLOCK PIN 0.000 1.801 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"MyDCC/CE", "phy_name":"MyDCC/CE" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q", "phy_name":"CNT1_e3_e3_e3_21__i0.ff_inst/Q" }, "arrive":2.072, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT1[0]", "phy_name":"CNT1[0]" }, "arrive":2.507, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i25_2_lut/A", "phy_name":"i25_2_lut/A" }, "pin1": { "log_name":"i25_2_lut/Z", "phy_name":"i25_2_lut/Z" }, "arrive":2.686, "delay":0.179 }, { "type":"net_delay", "net": { "log_name":"Enable", "phy_name":"Enable" }, "arrive":3.121, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":3.121, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT1_e3_e3_e3_21__i0.ff_inst/CLK->CNT1_e3_e3_e3_21__i0.ff_inst/Q SLICEREG REG_DEL 0.271 2.072 3 CNT1[0] NET DELAY 0.435 2.507 3 i25_2_lut/A->i25_2_lut/Z LUT4 CTOF_DEL 0.179 2.686 1 Enable NET DELAY 0.435 3.121 1 MyDCC/CE ENDPOINT 0.000 3.121 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":0.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":1.801, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 0.000 1 Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI CLOCK PIN 0.000 1.801 1 Uncertainty 0.000 1.801 Hold time 0.000 1.801 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time -1.801 Arrival Time 3.121 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 1.320 ++++ Path 12 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i0.ff_inst/Q (SLICEREG) Path End : CNT2_d_i1.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 61.6% (route), 38.4% (logic) Clock Skew : 0.510 ns Hold Constraint : -35.000 ns Path Slack : 35.053 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i0.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i1.ff_inst/DF", "phy_name":"CNT2_d_i1.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i0.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[0]", "phy_name":"CNT2[0]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.942, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i0.ff_inst/CLK->CNT2_e3_e3_e3_20__i0.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[0] NET DELAY 0.435 2.942 2 CNT2_d_i1.ff_inst/DF ENDPOINT 0.000 2.942 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i1.ff_inst/CLK", "phy_name":"CNT2_d_i1.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-35.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":-35.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":-33.741, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":-33.306, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":-33.306, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":-32.871, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":-32.689, "delay":0.182 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":-32.254, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-32.254, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 -35.000 1 Clk top CLOCK LATENCY 0.000 -35.000 1 Clk NET DELAY 0.000 -35.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 -33.741 3 Clk_c NET DELAY 0.435 -33.306 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 -33.306 9 clk2 NET DELAY 0.435 -32.871 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.182 -32.689 8 clk2_derived_9 NET DELAY 0.435 -32.254 8 CNT2_d_i1.ff_inst/CLK CLOCK PIN 0.000 -32.254 1 Uncertainty 0.000 -32.254 Hold time 0.143 -32.111 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time 32.111 Arrival Time 2.942 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 35.053 ++++ Path 13 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i1.ff_inst/Q (SLICEREG) Path End : CNT2_d_i2.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 61.6% (route), 38.4% (logic) Clock Skew : 0.510 ns Hold Constraint : -35.000 ns Path Slack : 35.053 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i1.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i2.ff_inst/DF", "phy_name":"CNT2_d_i2.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i1.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i1.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[1]", "phy_name":"CNT2[1]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.942, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i1.ff_inst/CLK->CNT2_e3_e3_e3_20__i1.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[1] NET DELAY 0.435 2.942 2 CNT2_d_i2.ff_inst/DF ENDPOINT 0.000 2.942 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i2.ff_inst/CLK", "phy_name":"CNT2_d_i2.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-35.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":-35.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":-33.741, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":-33.306, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":-33.306, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":-32.871, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":-32.689, "delay":0.182 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":-32.254, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-32.254, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 -35.000 1 Clk top CLOCK LATENCY 0.000 -35.000 1 Clk NET DELAY 0.000 -35.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 -33.741 3 Clk_c NET DELAY 0.435 -33.306 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 -33.306 9 clk2 NET DELAY 0.435 -32.871 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.182 -32.689 8 clk2_derived_9 NET DELAY 0.435 -32.254 8 CNT2_d_i2.ff_inst/CLK CLOCK PIN 0.000 -32.254 1 Uncertainty 0.000 -32.254 Hold time 0.143 -32.111 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time 32.111 Arrival Time 2.942 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 35.053 ++++ Path 14 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i2.ff_inst/Q (SLICEREG) Path End : CNT2_d_i3.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 61.6% (route), 38.4% (logic) Clock Skew : 0.510 ns Hold Constraint : -35.000 ns Path Slack : 35.053 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i2.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i3.ff_inst/DF", "phy_name":"CNT2_d_i3.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i2.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i2.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[2]", "phy_name":"CNT2[2]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.942, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i2.ff_inst/CLK->CNT2_e3_e3_e3_20__i2.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[2] NET DELAY 0.435 2.942 2 CNT2_d_i3.ff_inst/DF ENDPOINT 0.000 2.942 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i3.ff_inst/CLK", "phy_name":"CNT2_d_i3.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-35.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":-35.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":-33.741, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":-33.306, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":-33.306, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":-32.871, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":-32.689, "delay":0.182 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":-32.254, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-32.254, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 -35.000 1 Clk top CLOCK LATENCY 0.000 -35.000 1 Clk NET DELAY 0.000 -35.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 -33.741 3 Clk_c NET DELAY 0.435 -33.306 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 -33.306 9 clk2 NET DELAY 0.435 -32.871 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.182 -32.689 8 clk2_derived_9 NET DELAY 0.435 -32.254 8 CNT2_d_i3.ff_inst/CLK CLOCK PIN 0.000 -32.254 1 Uncertainty 0.000 -32.254 Hold time 0.143 -32.111 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time 32.111 Arrival Time 2.942 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 35.053 ++++ Path 15 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i3.ff_inst/Q (SLICEREG) Path End : CNT2_d_i4.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 61.6% (route), 38.4% (logic) Clock Skew : 0.510 ns Hold Constraint : -35.000 ns Path Slack : 35.053 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i3.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i4.ff_inst/DF", "phy_name":"CNT2_d_i4.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i3.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i3.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[3]", "phy_name":"CNT2[3]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.942, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i3.ff_inst/CLK->CNT2_e3_e3_e3_20__i3.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[3] NET DELAY 0.435 2.942 2 CNT2_d_i4.ff_inst/DF ENDPOINT 0.000 2.942 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i4.ff_inst/CLK", "phy_name":"CNT2_d_i4.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-35.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":-35.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":-33.741, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":-33.306, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":-33.306, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":-32.871, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":-32.689, "delay":0.182 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":-32.254, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-32.254, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 -35.000 1 Clk top CLOCK LATENCY 0.000 -35.000 1 Clk NET DELAY 0.000 -35.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 -33.741 3 Clk_c NET DELAY 0.435 -33.306 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 -33.306 9 clk2 NET DELAY 0.435 -32.871 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.182 -32.689 8 clk2_derived_9 NET DELAY 0.435 -32.254 8 CNT2_d_i4.ff_inst/CLK CLOCK PIN 0.000 -32.254 1 Uncertainty 0.000 -32.254 Hold time 0.143 -32.111 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time 32.111 Arrival Time 2.942 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 35.053 ++++ Path 16 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i4.ff_inst/Q (SLICEREG) Path End : CNT2_d_i5.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 61.6% (route), 38.4% (logic) Clock Skew : 0.510 ns Hold Constraint : -35.000 ns Path Slack : 35.053 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i4.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i5.ff_inst/DF", "phy_name":"CNT2_d_i5.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i4.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i4.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[4]", "phy_name":"CNT2[4]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.942, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i4.ff_inst/CLK->CNT2_e3_e3_e3_20__i4.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[4] NET DELAY 0.435 2.942 2 CNT2_d_i5.ff_inst/DF ENDPOINT 0.000 2.942 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i5.ff_inst/CLK", "phy_name":"CNT2_d_i5.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-35.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":-35.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":-33.741, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":-33.306, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":-33.306, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":-32.871, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":-32.689, "delay":0.182 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":-32.254, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-32.254, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 -35.000 1 Clk top CLOCK LATENCY 0.000 -35.000 1 Clk NET DELAY 0.000 -35.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 -33.741 3 Clk_c NET DELAY 0.435 -33.306 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 -33.306 9 clk2 NET DELAY 0.435 -32.871 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.182 -32.689 8 clk2_derived_9 NET DELAY 0.435 -32.254 8 CNT2_d_i5.ff_inst/CLK CLOCK PIN 0.000 -32.254 1 Uncertainty 0.000 -32.254 Hold time 0.143 -32.111 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time 32.111 Arrival Time 2.942 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 35.053 ++++ Path 17 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i5.ff_inst/Q (SLICEREG) Path End : CNT2_d_i6.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 61.6% (route), 38.4% (logic) Clock Skew : 0.510 ns Hold Constraint : -35.000 ns Path Slack : 35.053 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i5.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i6.ff_inst/DF", "phy_name":"CNT2_d_i6.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i5.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i5.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[5]", "phy_name":"CNT2[5]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.942, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i5.ff_inst/CLK->CNT2_e3_e3_e3_20__i5.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[5] NET DELAY 0.435 2.942 2 CNT2_d_i6.ff_inst/DF ENDPOINT 0.000 2.942 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i6.ff_inst/CLK", "phy_name":"CNT2_d_i6.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-35.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":-35.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":-33.741, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":-33.306, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":-33.306, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":-32.871, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":-32.689, "delay":0.182 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":-32.254, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-32.254, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 -35.000 1 Clk top CLOCK LATENCY 0.000 -35.000 1 Clk NET DELAY 0.000 -35.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 -33.741 3 Clk_c NET DELAY 0.435 -33.306 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 -33.306 9 clk2 NET DELAY 0.435 -32.871 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.182 -32.689 8 clk2_derived_9 NET DELAY 0.435 -32.254 8 CNT2_d_i6.ff_inst/CLK CLOCK PIN 0.000 -32.254 1 Uncertainty 0.000 -32.254 Hold time 0.143 -32.111 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time 32.111 Arrival Time 2.942 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 35.053 ++++ Path 18 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i6.ff_inst/Q (SLICEREG) Path End : CNT2_d_i7.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 61.6% (route), 38.4% (logic) Clock Skew : 0.510 ns Hold Constraint : -35.000 ns Path Slack : 35.053 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i6.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i7.ff_inst/DF", "phy_name":"CNT2_d_i7.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i6.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i6.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[6]", "phy_name":"CNT2[6]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.942, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i6.ff_inst/CLK->CNT2_e3_e3_e3_20__i6.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[6] NET DELAY 0.435 2.942 2 CNT2_d_i7.ff_inst/DF ENDPOINT 0.000 2.942 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i7.ff_inst/CLK", "phy_name":"CNT2_d_i7.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-35.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":-35.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":-33.741, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":-33.306, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":-33.306, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":-32.871, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":-32.689, "delay":0.182 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":-32.254, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-32.254, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 -35.000 1 Clk top CLOCK LATENCY 0.000 -35.000 1 Clk NET DELAY 0.000 -35.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 -33.741 3 Clk_c NET DELAY 0.435 -33.306 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 -33.306 9 clk2 NET DELAY 0.435 -32.871 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.182 -32.689 8 clk2_derived_9 NET DELAY 0.435 -32.254 8 CNT2_d_i7.ff_inst/CLK CLOCK PIN 0.000 -32.254 1 Uncertainty 0.000 -32.254 Hold time 0.143 -32.111 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time 32.111 Arrival Time 2.942 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 35.053 ++++ Path 19 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Path Begin : CNT2_e3_e3_e3_20__i7.ff_inst/Q (SLICEREG) Path End : CNT2_d_i8.ff_inst/DF (SLICEREG) Source Clock : CLK2 (R) Destination Clock: CLK2 (F) Logic Level : 1 Delay Ratio : 61.6% (route), 38.4% (logic) Clock Skew : 0.510 ns Hold Constraint : -35.000 ns Path Slack : 35.053 ns (Passed) Source Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK" }, "path_sections":[ { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":0.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":1.366, "delay":1.366 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":1.801, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":1.801, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":2.236, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.236, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ Clk top CLOCK LATENCY 0.000 0.000 1 Clk NET DELAY 0.000 0.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.366 1.366 3 Clk_c NET DELAY 0.435 1.801 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 1.801 9 clk2 NET DELAY 0.435 2.236 9 CNT2_e3_e3_e3_20__i7.ff_inst/CLK CLOCK PIN 0.000 2.236 1 Data Path { "path_begin": { "type":"pin", "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/Q" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i8.ff_inst/DF", "phy_name":"CNT2_d_i8.ff_inst/DF" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/CLK" }, "pin1": { "log_name":"CNT2_e3_e3_e3_20__i7.ff_inst/Q", "phy_name":"CNT2_e3_e3_e3_20__i7.ff_inst/Q" }, "arrive":2.507, "delay":0.271 }, { "type":"net_delay", "net": { "log_name":"CNT2[7]", "phy_name":"CNT2[7]" }, "arrive":2.942, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":2.942, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CNT2_e3_e3_e3_20__i7.ff_inst/CLK->CNT2_e3_e3_e3_20__i7.ff_inst/Q SLICEREG REG_DEL 0.271 2.507 2 CNT2[7] NET DELAY 0.435 2.942 2 CNT2_d_i8.ff_inst/DF ENDPOINT 0.000 2.942 1 Destination Clock Path { "path_begin": { "type":"port", "log_name":"Clk", "phy_name":"Clk" }, "path_end": { "type":"pin", "log_name":"CNT2_d_i8.ff_inst/CLK", "phy_name":"CNT2_d_i8.ff_inst/CLK" }, "path_sections":[ { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-35.000, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"Clk", "phy_name":"Clk" }, "arrive":-35.000, "delay":0.000 }, { "type":"site_delay", "pin0": { "log_name":"Clk_pad.bb_inst/B", "phy_name":"Clk_pad.bb_inst/B" }, "pin1": { "log_name":"Clk_pad.bb_inst/O", "phy_name":"Clk_pad.bb_inst/O" }, "arrive":-33.741, "delay":1.259 }, { "type":"net_delay", "net": { "log_name":"Clk_c", "phy_name":"Clk_c" }, "arrive":-33.306, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"MyDCC/CLKI", "phy_name":"MyDCC/CLKI" }, "pin1": { "log_name":"MyDCC/CLKO", "phy_name":"MyDCC/CLKO" }, "arrive":-33.306, "delay":0.000 }, { "type":"net_delay", "net": { "log_name":"clk2", "phy_name":"clk2" }, "arrive":-32.871, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"i12_1_lut/A", "phy_name":"i12_1_lut/A" }, "pin1": { "log_name":"i12_1_lut/Z", "phy_name":"i12_1_lut/Z" }, "arrive":-32.689, "delay":0.182 }, { "type":"net_delay", "net": { "log_name":"clk2_derived_9", "phy_name":"clk2_derived_9" }, "arrive":-32.254, "delay":0.435 }, { "type":"site_delay", "pin0": { "log_name":"", "phy_name":"" }, "pin1": { "log_name":"", "phy_name":"" }, "arrive":-32.254, "delay":0.000 } ] } Name Cell/Site Name Delay Name Incr Arrival/Required Time Fanout ---------------------------------------- -------------- ------------- ----- --------------------- ------ CONSTRAINT 0.000 -35.000 1 Clk top CLOCK LATENCY 0.000 -35.000 1 Clk NET DELAY 0.000 -35.000 1 Clk_pad.bb_inst/B->Clk_pad.bb_inst/O BB PADI_DEL 1.259 -33.741 3 Clk_c NET DELAY 0.435 -33.306 3 MyDCC/CLKI->MyDCC/CLKO DCC DCC_DEL 0.000 -33.306 9 clk2 NET DELAY 0.435 -32.871 9 i12_1_lut/A->i12_1_lut/Z INV CTOF_DEL 0.182 -32.689 8 clk2_derived_9 NET DELAY 0.435 -32.254 8 CNT2_d_i8.ff_inst/CLK CLOCK PIN 0.000 -32.254 1 Uncertainty 0.000 -32.254 Hold time 0.143 -32.111 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Required Time 32.111 Arrival Time 2.942 ---------------------------------------- -------------- ------------- ----- --------------------- ------ Path Slack (Passed) 35.053 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ End of Detailed Report for timing paths +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 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    Contents