BITGEN: Bitstream Generator Radiant Software (64-bit) 2023.2.1.288.0 Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. Copyright (c) 2002-2023 Lattice Semiconductor Corporation, All rights reserved. Wed Jun 5 12:17:13 2024 Command: bitgen -w -gui -msgset C:/Users/ssyahril/Downloads/FAE_F2F_Training_Labs_V2/FAE_F2F_Training_Labs_V2/LAB_03/promote.xml -g REGISTER_INIT:ON lab03_impl_1.udb C:/Users/ssyahril/Downloads/FAE_F2F_Training_Labs_V2/FAE_F2F_Training_Labs_V2/LAB_03/impl_1/lab03_impl_1 Running DRC. DRC detected 0 errors and 0 warnings. Preference Summary: +---------------------------------+---------------------------------+ | Preference | Current Setting | +---------------------------------+---------------------------------+ | DONE_EX | OFF* | +---------------------------------+---------------------------------+ | DONE_OD | ON* | +---------------------------------+---------------------------------+ | CONFIG_SECURE | OFF* | +---------------------------------+---------------------------------+ | EARLY_IO_RELEASE | OFF* | +---------------------------------+---------------------------------+ | REGISTER_INIT | ON** | +---------------------------------+---------------------------------+ | MASTER_PREAMBLE_TIMER_CYCLES | 600000* | +---------------------------------+---------------------------------+ | SLAVE_SPI_PORT | DISABLE** | +---------------------------------+---------------------------------+ | SLAVE_I2C_PORT | DISABLE** | +---------------------------------+---------------------------------+ | SLAVE_I3C_PORT | DISABLE** | +---------------------------------+---------------------------------+ | JTAG_PORT | ENABLE** | +---------------------------------+---------------------------------+ | DONE_PORT | ENABLE** | +---------------------------------+---------------------------------+ | INITN_PORT | ENABLE** | +---------------------------------+---------------------------------+ | PROGRAMN_PORT | ENABLE** | +---------------------------------+---------------------------------+ | TRANSFR | OFF* | +---------------------------------+---------------------------------+ | MASTER_SPI_PORT | DISABLE** | +---------------------------------+---------------------------------+ | MCCLK_FREQ | 3.5* | +---------------------------------+---------------------------------+ | COMPRESS_CONFIG | OFF* | +---------------------------------+---------------------------------+ | BACKGROUND_RECONFIG | OFF* | +---------------------------------+---------------------------------+ | CONFIG_IOSLEW | SLOW* | +---------------------------------+---------------------------------+ | WAKE_UP | ENABLE_DONE_SYNC* | +---------------------------------+---------------------------------+ | BOOTMODE | DUAL* | +---------------------------------+---------------------------------+ | CONFIGIO_VOLTAGE_BANK0 | NOT_SPECIFIED* | +---------------------------------+---------------------------------+ | CONFIGIO_VOLTAGE_BANK1 | NOT_SPECIFIED* | +---------------------------------+---------------------------------+ * Default setting. ** The specified setting matches the default setting. Creating bit map... Bitstream Status: Final Version 10.0. Saving bit stream in "C:/Users/ssyahril/Downloads/FAE_F2F_Training_Labs_V2/FAE_F2F_Training_Labs_V2/LAB_03/impl_1/lab03_impl_1.bit". Bitstream generation complete!